Lines Matching refs:ret
64 int ret;
70 ret = LPASS_CDC_DMA_INTERFACE1;
75 ret = LPASS_CDC_DMA_INTERFACE2;
80 ret = LPASS_CDC_DMA_INTERFACE3;
85 ret = LPASS_CDC_DMA_INTERFACE4;
90 ret = LPASS_CDC_DMA_INTERFACE5;
95 ret = LPASS_CDC_DMA_INTERFACE6;
100 ret = LPASS_CDC_DMA_INTERFACE7;
105 ret = LPASS_CDC_DMA_INTERFACE8;
110 ret = LPASS_CDC_DMA_INTERFACE9;
113 ret = LPASS_CDC_DMA_INTERFACE10;
116 ret = -EINVAL;
119 return ret;
129 int ret, id, codec_intf;
142 ret = regmap_fields_write(dmactl->codec_intf, id, codec_intf);
143 if (ret) {
144 dev_err(dev, "error writing to dmactl codec_intf reg field: %d\n", ret);
145 return ret;
147 ret = regmap_fields_write(dmactl->codec_fs_sel, id, 0x0);
148 if (ret) {
149 dev_err(dev, "error writing to dmactl codec_fs_sel reg field: %d\n", ret);
150 return ret;
152 ret = regmap_fields_write(dmactl->codec_fs_delay, id, 0x0);
153 if (ret) {
154 dev_err(dev, "error writing to dmactl codec_fs_delay reg field: %d\n", ret);
155 return ret;
157 ret = regmap_fields_write(dmactl->codec_pack, id, 0x1);
158 if (ret) {
159 dev_err(dev, "error writing to dmactl codec_pack reg field: %d\n", ret);
160 return ret;
162 ret = regmap_fields_write(dmactl->codec_enable, id, LPAIF_DMACTL_ENABLE_ON);
163 if (ret) {
164 dev_err(dev, "error writing to dmactl codec_enable reg field: %d\n", ret);
165 return ret;
219 unsigned int ret, regval;
248 ret = regmap_fields_write(dmactl->codec_channel, id, regval);
249 if (ret) {
251 "error writing to dmactl codec_channel reg field: %d\n", ret);
252 return ret;
262 int ret = 0, id;
277 ret = regmap_fields_write(dmactl->codec_enable, id, LPAIF_DMACTL_ENABLE_OFF);
278 if (ret) {
280 "error writing to dmactl codec_enable reg: %d\n", ret);
281 return ret;
285 ret = -EINVAL;
289 return ret;