Lines Matching defs:afe
15 #include "mt8188-afe-clk.h"
16 #include "mt8188-afe-common.h"
248 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
249 struct mt8188_afe_private *afe_priv = afe->platform_priv;
280 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
281 struct mt8188_afe_private *afe_priv = afe->platform_priv;
354 static int get_etdm_id_by_name(struct mtk_base_afe *afe,
373 static struct mtk_dai_etdm_priv *get_etdm_priv_by_name(struct mtk_base_afe *afe,
376 struct mt8188_afe_private *afe_priv = afe->platform_priv;
377 int dai_id = get_etdm_id_by_name(afe, name);
386 static int mtk_dai_etdm_enable_mclk(struct mtk_base_afe *afe, int dai_id)
388 struct mt8188_afe_private *afe_priv = afe->platform_priv;
419 regmap_update_bits(afe->regmap, etdm_reg.con1, mask, val);
422 mt8188_afe_enable_clk(afe, afe_priv->clk[clkmux_id]);
425 ret = mt8188_afe_set_clk_parent(afe, afe_priv->clk[clkmux_id],
431 ret = mt8188_afe_set_clk_rate(afe, afe_priv->clk[clkdiv_id],
434 mt8188_afe_enable_clk(afe, afe_priv->clk[clkdiv_id]);
439 static int mtk_dai_etdm_disable_mclk(struct mtk_base_afe *afe, int dai_id)
441 struct mt8188_afe_private *afe_priv = afe->platform_priv;
448 mt8188_afe_disable_clk(afe, afe_priv->clk[clkdiv_id]);
449 mt8188_afe_disable_clk(afe, afe_priv->clk[clkmux_id]);
459 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
464 etdm_priv = get_etdm_priv_by_name(afe, w->name);
466 dev_dbg(afe->dev, "etdm_priv == NULL\n");
470 cur_apll = mt8188_get_apll_by_name(afe, source->name);
471 need_apll = mt8188_get_apll_by_rate(afe, etdm_priv->rate);
481 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
485 etdm_priv = get_etdm_priv_by_name(afe, w->name);
487 cur_apll = mt8188_get_apll_by_name(afe, source->name);
497 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
498 struct mt8188_afe_private *afe_priv = afe->platform_priv;
502 mclk_id = get_etdm_id_by_name(afe, source->name);
504 dev_dbg(afe->dev, "mclk_id < 0\n");
508 etdm_priv = get_etdm_priv_by_name(afe, w->name);
510 dev_dbg(afe->dev, "etdm_priv == NULL\n");
514 if (get_etdm_id_by_name(afe, sink->name) == mclk_id)
530 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
531 struct mt8188_afe_private *afe_priv = afe->platform_priv;
536 source_id = get_etdm_id_by_name(afe, source->name);
538 dev_dbg(afe->dev, "%s() source_id < 0\n", __func__);
542 etdm_priv = get_etdm_priv_by_name(afe, w->name);
544 dev_dbg(afe->dev, "%s() etdm_priv == NULL\n", __func__);
572 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
580 mt8188_apll1_enable(afe);
582 mt8188_apll2_enable(afe);
586 mt8188_apll1_disable(afe);
588 mt8188_apll2_disable(afe);
602 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
603 int mclk_id = get_etdm_id_by_name(afe, w->name);
606 dev_dbg(afe->dev, "%s() mclk_id < 0\n", __func__);
615 mtk_dai_etdm_enable_mclk(afe, mclk_id);
618 mtk_dai_etdm_disable_mclk(afe, mclk_id);
632 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
639 mtk_dai_etdm_enable_mclk(afe, MT8188_AFE_IO_DPTX);
642 mtk_dai_etdm_disable_mclk(afe, MT8188_AFE_IO_DPTX);
656 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
657 struct mt8188_afe_private *afe_priv = afe->platform_priv;
661 etdm_id = get_etdm_id_by_name(afe, w->name);
663 dev_dbg(afe->dev, "%s() etdm_id < 0\n", __func__);
669 dev_dbg(afe->dev, "%s() cg_id < 0\n", __func__);
678 mt8188_afe_enable_clk(afe, afe_priv->clk[cg_id]);
681 mt8188_afe_disable_clk(afe, afe_priv->clk[cg_id]);
695 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
696 struct mt8188_afe_private *afe_priv = afe->platform_priv;
703 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_HDMI_OUT]);
706 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_HDMI_OUT]);
1017 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component);
1051 regmap_read(afe->regmap, reg, &old_val);
1056 regmap_update_bits(afe->regmap, reg, mask, val);
1066 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component);
1096 regmap_read(afe->regmap, reg, &value);
1730 static int mt8188_etdm_sync_mode_slv(struct mtk_base_afe *afe, int dai_id)
1732 struct mt8188_afe_private *afe_priv = afe->platform_priv;
1778 regmap_update_bits(afe->regmap, reg, mask, val);
1783 static int mt8188_etdm_sync_mode_mst(struct mtk_base_afe *afe, int dai_id)
1785 struct mt8188_afe_private *afe_priv = afe->platform_priv;
1836 regmap_update_bits(afe->regmap, reg, mask, val);
1838 regmap_set_bits(afe->regmap, etdm_reg.con0, ETDM_CON0_SYNC_MODE);
1843 static int mt8188_etdm_sync_mode_configure(struct mtk_base_afe *afe, int dai_id)
1845 struct mt8188_afe_private *afe_priv = afe->platform_priv;
1856 mt8188_etdm_sync_mode_slv(afe, dai_id);
1858 mt8188_etdm_sync_mode_mst(afe, dai_id);
1864 static int mtk_dai_etdm_fifo_mode(struct mtk_base_afe *afe,
1892 regmap_update_bits(afe->regmap, reg, mask, val);
1896 static int mtk_dai_etdm_in_configure(struct mtk_base_afe *afe,
1901 struct mt8188_afe_private *afe_priv = afe->platform_priv;
1919 dev_dbg(afe->dev, "%s rate %u channels %u, id %d\n",
1928 mtk_dai_etdm_fifo_mode(afe, dai_id, 0);
1930 mtk_dai_etdm_fifo_mode(afe, dai_id, rate);
1938 regmap_update_bits(afe->regmap, etdm_reg.con1, mask, val);
1957 regmap_update_bits(afe->regmap, etdm_reg.con2, mask, val);
1973 regmap_update_bits(afe->regmap, etdm_reg.con3, mask, val);
1992 regmap_update_bits(afe->regmap, etdm_reg.con4, mask, val);
2010 regmap_update_bits(afe->regmap, etdm_reg.con5, mask, val);
2014 static int mtk_dai_etdm_out_configure(struct mtk_base_afe *afe,
2019 struct mt8188_afe_private *afe_priv = afe->platform_priv;
2035 dev_dbg(afe->dev, "%s rate %u channels %u, id %d\n",
2046 regmap_update_bits(afe->regmap, etdm_reg.con0, mask, val);
2057 regmap_update_bits(afe->regmap, etdm_reg.con1, mask, val);
2076 regmap_update_bits(afe->regmap, etdm_reg.con4, mask, val);
2095 regmap_update_bits(afe->regmap, etdm_reg.con5, mask, val);
2100 static int mtk_dai_etdm_configure(struct mtk_base_afe *afe,
2106 struct mt8188_afe_private *afe_priv = afe->platform_priv;
2127 dev_dbg(afe->dev, "%s fmt %u data %u lrck %d-%u bck %d, slv %u\n",
2131 dev_dbg(afe->dev, "%s rate %u channels %u bitwidth %u, id %d\n",
2139 dev_err(afe->dev, "%s bck rate %u not support\n",
2157 dev_err(afe->dev, "%s id %d only support master mode\n",
2163 regmap_update_bits(afe->regmap, etdm_reg.con0, mask, val);
2166 mtk_dai_etdm_in_configure(afe, rate, channels, dai_id);
2168 mtk_dai_etdm_out_configure(afe, rate, channels, dai_id);
2180 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
2181 struct mt8188_afe_private *afe_priv = afe->platform_priv;
2188 dev_dbg(afe->dev, "%s '%s' period %u-%u\n",
2201 ret = mtk_dai_etdm_configure(afe, rate, channels,
2208 ret = mtk_dai_etdm_configure(afe, rate, channels,
2213 ret = mt8188_etdm_sync_mode_configure(afe, slv_dai_id);
2224 ret = mtk_dai_etdm_configure(afe, rate, channels,
2233 static int mtk_dai_etdm_cal_mclk(struct mtk_base_afe *afe, int freq, int dai_id)
2235 struct mt8188_afe_private *afe_priv = afe->platform_priv;
2254 apll_rate = mt8188_afe_get_mclk_source_rate(afe, apll);
2257 dev_err(afe->dev, "freq %d > apll rate %d\n", freq, apll_rate);
2262 dev_err(afe->dev, "APLL%d cannot generate freq Hz\n", apll);
2276 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
2277 struct mt8188_afe_private *afe_priv = afe->platform_priv;
2292 return mtk_dai_etdm_cal_mclk(afe, freq, dai_id);
2299 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
2300 struct mt8188_afe_private *afe_priv = afe->platform_priv;
2323 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
2324 struct mt8188_afe_private *afe_priv = afe->platform_priv;
2418 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
2419 struct mt8188_afe_private *afe_priv = afe->platform_priv;
2433 regmap_update_bits(afe->regmap, AFE_DPTX_CON,
2436 regmap_update_bits(afe->regmap, AFE_DPTX_CON,
2439 regmap_update_bits(afe->regmap, AFE_DPTX_CON,
2453 ret = mtk_dai_etdm_configure(afe, rate, channels, width, dai->id);
2463 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
2464 struct mt8188_afe_private *afe_priv = afe->platform_priv;
2475 return mtk_dai_etdm_cal_mclk(afe, freq, dai->id);
2573 static void mt8188_etdm_update_sync_info(struct mtk_base_afe *afe)
2575 struct mt8188_afe_private *afe_priv = afe->platform_priv;
2587 dev_err(afe->dev, "%s [%d] wrong sync source\n",
2595 static void mt8188_dai_etdm_parse_of(struct mtk_base_afe *afe)
2597 const struct device_node *of_node = afe->dev->of_node;
2598 struct mt8188_afe_private *afe_priv = afe->platform_priv;
2634 dev_err(afe->dev, "%s invalid id=%d\n",
2663 dev_err(afe->dev, "%s [%d] invalid chn %u\n",
2669 mt8188_etdm_update_sync_info(afe);
2672 static int init_etdm_priv_data(struct mtk_base_afe *afe)
2674 struct mt8188_afe_private *afe_priv = afe->platform_priv;
2679 etdm_priv = devm_kzalloc(afe->dev,
2691 mt8188_dai_etdm_parse_of(afe);
2695 int mt8188_dai_etdm_register(struct mtk_base_afe *afe)
2699 dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
2703 list_add(&dai->list, &afe->sub_dais);
2715 return init_etdm_priv_data(afe);