Lines Matching refs:afe
11 #include "mt8186-afe-clk.h"
12 #include "mt8186-afe-common.h"
13 #include "mt8186-afe-gpio.h"
76 static int get_i2s_id_by_name(struct mtk_base_afe *afe,
91 static struct mtk_afe_i2s_priv *get_i2s_priv_by_name(struct mtk_base_afe *afe,
94 struct mt8186_afe_private *afe_priv = afe->platform_priv;
95 int dai_id = get_i2s_id_by_name(afe, name);
117 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
120 i2s_priv = get_i2s_priv_by_name(afe, kcontrol->id.name);
130 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
140 dev_dbg(afe->dev, "%s(), kcontrol name %s, hd_en %d\n",
143 i2s_priv = get_i2s_priv_by_name(afe, kcontrol->id.name);
362 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
365 i2s_priv = get_i2s_priv_by_name(afe, w->name);
372 mt8186_afe_gpio_request(afe->dev, true, i2s_priv->id, 0);
375 mt8186_afe_gpio_request(afe->dev, false, i2s_priv->id, 0);
389 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
397 mt8186_apll1_enable(afe);
399 mt8186_apll2_enable(afe);
403 mt8186_apll1_disable(afe);
405 mt8186_apll2_disable(afe);
419 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
425 i2s_priv = get_i2s_priv_by_name(afe, w->name);
429 mt8186_mck_enable(afe, i2s_priv->mclk_id, i2s_priv->mclk_rate);
433 mt8186_mck_disable(afe, i2s_priv->mclk_id);
542 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
545 i2s_priv = get_i2s_priv_by_name(afe, sink->name);
549 return i2s_priv->share_i2s_id == get_i2s_id_by_name(afe, source->name);
557 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
560 i2s_priv = get_i2s_priv_by_name(afe, sink->name);
561 if (get_i2s_id_by_name(afe, sink->name) ==
562 get_i2s_id_by_name(afe, source->name))
569 if (i2s_priv->share_i2s_id == get_i2s_id_by_name(afe, source->name))
580 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
585 i2s_priv = get_i2s_priv_by_name(afe, w->name);
587 cur_apll = mt8186_get_apll_by_name(afe, source->name);
589 i2s_need_apll = mt8186_get_apll_by_rate(afe, i2s_priv->rate);
599 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
602 i2s_priv = get_i2s_priv_by_name(afe, sink->name);
603 if (get_i2s_id_by_name(afe, sink->name) ==
604 get_i2s_id_by_name(afe, source->name))
611 if (i2s_priv->share_i2s_id == get_i2s_id_by_name(afe, source->name))
622 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
626 i2s_priv = get_i2s_priv_by_name(afe, w->name);
628 cur_apll = mt8186_get_apll_by_name(afe, source->name);
813 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
815 unsigned int rate_reg = mt8186_rate_transform(afe->dev,
819 dev_dbg(afe->dev, "%s(), id %d, stream %d, rate %d\n",
828 regmap_write(afe->regmap, AFE_CONNSYS_I2S_CON, i2s_con);
831 regmap_update_bits(afe->regmap, AFE_CONNSYS_I2S_CON,
835 regmap_update_bits(afe->regmap, AFE_CONNSYS_I2S_CON,
839 regmap_write(afe->regmap, AFE_ASRC_2CH_CON3, 0x1b9000);
841 regmap_write(afe->regmap, AFE_ASRC_2CH_CON3, 0x140000);
843 regmap_write(afe->regmap, AFE_ASRC_2CH_CON3, 0x1e0000);
846 regmap_write(afe->regmap, AFE_ASRC_2CH_CON4, 0x140000);
847 regmap_write(afe->regmap, AFE_ASRC_2CH_CON9, 0x36000);
848 regmap_write(afe->regmap, AFE_ASRC_2CH_CON10, 0x2fc00);
849 regmap_write(afe->regmap, AFE_ASRC_2CH_CON6, 0x7ef4);
850 regmap_write(afe->regmap, AFE_ASRC_2CH_CON5, 0xff5986);
853 regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON2,
862 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
863 struct mt8186_afe_private *afe_priv = afe->platform_priv;
865 dev_dbg(afe->dev, "%s(), cmd %d, stream %d\n",
872 regmap_update_bits(afe->regmap,
878 regmap_update_bits(afe->regmap,
884 regmap_update_bits(afe->regmap,
888 regmap_update_bits(afe->regmap,
897 regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON0,
899 regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON5,
903 regmap_update_bits(afe->regmap, AFE_CONNSYS_I2S_CON,
907 regmap_update_bits(afe->regmap, AFE_CONNSYS_I2S_CON,
924 static int mtk_dai_i2s_config(struct mtk_base_afe *afe,
928 struct mt8186_afe_private *afe_priv = afe->platform_priv;
932 unsigned int rate_reg = mt8186_rate_transform(afe->dev,
938 dev_dbg(afe->dev, "%s(), id %d, rate %d, format %d\n",
949 regmap_update_bits(afe->regmap, AFE_I2S_CON,
957 regmap_update_bits(afe->regmap, AFE_I2S_CON1,
965 regmap_update_bits(afe->regmap, AFE_I2S_CON2,
972 regmap_update_bits(afe->regmap, AFE_I2S_CON3,
976 dev_err(afe->dev, "%s(), id %d not support\n",
983 ret = mtk_dai_i2s_config(afe, params, i2s_priv->share_i2s_id);
995 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
997 return mtk_dai_i2s_config(afe, params, dai->id);
1003 struct mtk_base_afe *afe = dev_get_drvdata(dai->dev);
1004 struct mt8186_afe_private *afe_priv = afe->platform_priv;
1010 dev_err(afe->dev, "%s(), dir != SND_SOC_CLOCK_OUT", __func__);
1014 dev_dbg(afe->dev, "%s(), freq %d\n", __func__, freq);
1016 apll = mt8186_get_apll_by_rate(afe, freq);
1017 apll_rate = mt8186_get_apll_rate(afe, apll);
1020 dev_err(afe->dev, "%s(), freq > apll rate", __func__);
1025 dev_err(afe->dev, "%s(), APLL cannot generate freq Hz", __func__);
1037 dev_err(afe->dev, "%s(), share_i2s_priv == NULL", __func__);
1164 * @afe: Pointer to &struct mtk_base_afe
1168 int mt8186_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name,
1174 secondary_i2s_priv = get_i2s_priv_by_name(afe, secondary_i2s_name);
1178 main_i2s_id = get_i2s_id_by_name(afe, main_i2s_name);
1188 static int mt8186_dai_i2s_set_priv(struct mtk_base_afe *afe)
1194 ret = mt8186_dai_set_priv(afe, mt8186_i2s_priv[i].id,
1204 int mt8186_dai_i2s_register(struct mtk_base_afe *afe)
1209 dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
1213 list_add(&dai->list, &afe->sub_dais);
1226 ret = mt8186_dai_i2s_set_priv(afe);