Lines Matching refs:afe_priv
75 struct mt8186_afe_private *afe_priv = afe->platform_priv;
83 return afe_priv->dai_priv[dai_id];
247 struct mt8186_afe_private *afe_priv = afe->platform_priv;
248 int mtkaif_dmic = afe_priv->mtkaif_dmic;
288 struct mt8186_afe_private *afe_priv = afe->platform_priv;
292 if (afe_priv->mtkaif_protocol == MTKAIF_PROTOCOL_2_CLK_P2)
310 struct mt8186_afe_private *afe_priv = afe->platform_priv;
316 if (afe_priv->mtkaif_protocol == MTKAIF_PROTOCOL_2_CLK_P2) {
325 if (afe_priv->mtkaif_chosen_phase[0] < 0 &&
326 afe_priv->mtkaif_chosen_phase[1] < 0) {
330 afe_priv->mtkaif_chosen_phase[0],
331 afe_priv->mtkaif_chosen_phase[1]);
335 if (afe_priv->mtkaif_chosen_phase[0] < 0 ||
336 afe_priv->mtkaif_chosen_phase[1] < 0) {
340 afe_priv->mtkaif_chosen_phase[0],
341 afe_priv->mtkaif_chosen_phase[1]);
347 if (afe_priv->mtkaif_phase_cycle[0] >=
348 afe_priv->mtkaif_phase_cycle[1]) {
350 delay_cycle = afe_priv->mtkaif_phase_cycle[0] -
351 afe_priv->mtkaif_phase_cycle[1];
354 delay_cycle = afe_priv->mtkaif_phase_cycle[1] -
355 afe_priv->mtkaif_phase_cycle[0];
370 } else if (afe_priv->mtkaif_protocol == MTKAIF_PROTOCOL_2) {
415 struct mt8186_afe_private *afe_priv = afe->platform_priv;
417 ucontrol->value.integer.value[0] = afe_priv->mtkaif_dmic;
427 struct mt8186_afe_private *afe_priv = afe->platform_priv;
435 if (afe_priv->mtkaif_dmic == dmic_on)
438 afe_priv->mtkaif_dmic = dmic_on;
646 struct mt8186_afe_private *afe_priv = afe->platform_priv;
649 struct mtk_afe_adda_priv *adda_priv = afe_priv->dai_priv[id];
832 struct mt8186_afe_private *afe_priv = afe->platform_priv;
858 afe_priv->dai_priv[MT8186_DAI_AP_DMIC] =
859 afe_priv->dai_priv[MT8186_DAI_ADDA];