Lines Matching defs:tdm_con
478 unsigned int tdm_con = 0;
513 tdm_con |= 1 << LRCK_INVERSE_SFT;
516 tdm_con |= 1 << DELAY_DATA_SFT;
517 tdm_con |= get_tdm_lrck_width(format) << LRCK_TDM_WIDTH_SFT;
519 tdm_con |= 0 << DELAY_DATA_SFT;
520 tdm_con |= 0 << LRCK_TDM_WIDTH_SFT;
523 tdm_con |= 1 << LEFT_ALIGN_SFT;
524 tdm_con |= get_tdm_wlen(format) << WLEN_SFT;
525 tdm_con |= get_tdm_ch(out_channels_per_sdata) << CHANNEL_NUM_SFT;
526 tdm_con |= get_tdm_channel_bck(format) << CHANNEL_BCK_CYCLES_SFT;
527 regmap_write(afe->regmap, AFE_TDM_CON1, tdm_con);
533 tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;
534 tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT1_SFT;
535 tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT2_SFT;
536 tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT3_SFT;
540 tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;
541 tdm_con |= TDM_CH_START_O32_O33 << ST_CH_PAIR_SOUT1_SFT;
542 tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT2_SFT;
543 tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT3_SFT;
547 tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;
548 tdm_con |= TDM_CH_START_O32_O33 << ST_CH_PAIR_SOUT1_SFT;
549 tdm_con |= TDM_CH_START_O34_O35 << ST_CH_PAIR_SOUT2_SFT;
550 tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT3_SFT;
554 tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;
555 tdm_con |= TDM_CH_START_O32_O33 << ST_CH_PAIR_SOUT1_SFT;
556 tdm_con |= TDM_CH_START_O34_O35 << ST_CH_PAIR_SOUT2_SFT;
557 tdm_con |= TDM_CH_START_O36_O37 << ST_CH_PAIR_SOUT3_SFT;
560 tdm_con = 0;
563 tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;
564 tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT1_SFT;
565 tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT2_SFT;
566 tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT3_SFT;
569 regmap_write(afe->regmap, AFE_TDM_CON2, tdm_con);