Lines Matching defs:skl
17 #include "skl.h"
49 struct skl_dev *skl = ctx->thread_context;
55 ret = skl_prepare_lib_load(skl, &skl->lib_info[i], &stripped_fw,
73 ret = skl_sst_ipc_load_library(&skl->ipc, dma_id, i, true);
184 struct skl_dev *skl = ctx->thread_context;
196 if (skl->is_first_boot) {
232 ret = wait_event_timeout(skl->boot_wait, skl->boot_complete,
240 skl->fw_loaded = true;
268 struct skl_dev *skl = ctx->thread_context;
269 struct skl_d0i3_data *d0i3 = &skl->d0i3;
271 if (skl->cores.state[SKL_DSP_CORE0_ID] != SKL_DSP_RUNNING)
288 struct skl_dev *skl = container_of(work,
290 struct sst_dsp *ctx = skl->dsp;
291 struct skl_d0i3_data *d0i3 = &skl->d0i3;
314 ret = skl_ipc_set_d0ix(&skl->ipc, &msg);
322 if (skl->update_d0i3c)
323 skl->update_d0i3c(skl->dev, true);
326 skl->cores.state[SKL_DSP_CORE0_ID] = SKL_DSP_RUNNING_D0I3;
331 struct skl_dev *skl = ctx->thread_context;
332 struct skl_d0i3_data *d0i3 = &skl->d0i3;
350 struct skl_dev *skl = ctx->thread_context;
355 cancel_delayed_work_sync(&skl->d0i3.work);
358 if (skl->cores.state[SKL_DSP_CORE0_ID] != SKL_DSP_RUNNING_D0I3)
368 if (skl->d0i3.state == SKL_DSP_D0I3_STREAMING)
372 if (skl->update_d0i3c)
373 skl->update_d0i3c(skl->dev, false);
375 ret = skl_ipc_set_d0ix(&skl->ipc, &msg);
381 skl->cores.state[SKL_DSP_CORE0_ID] = SKL_DSP_RUNNING;
382 skl->d0i3.state = SKL_DSP_D0I3_NONE;
389 struct skl_dev *skl = ctx->thread_context;
394 if (skl->fw_loaded == false) {
395 skl->boot_complete = false;
402 if (skl->lib_count > 1) {
403 ret = bxt_load_library(ctx, skl->lib_info,
404 skl->lib_count);
410 skl->cores.state[core_id] = SKL_DSP_RUNNING;
432 skl->boot_complete = false;
440 ret = wait_event_timeout(skl->boot_wait,
441 skl->boot_complete,
463 ret = skl_ipc_set_dx(&skl->ipc, BXT_INSTANCE_ID,
472 skl->cores.state[core_id] = SKL_DSP_RUNNING;
486 struct skl_dev *skl = ctx->thread_context;
495 ret = skl_ipc_set_dx(&skl->ipc, BXT_INSTANCE_ID,
505 skl->fw_loaded = false;
518 skl->cores.state[core_id] = SKL_DSP_RESET;
548 struct skl_dev *skl;
558 skl = *dsp;
559 sst = skl->dsp;
571 ret = skl_ipc_init(dev, skl);
578 skl->ipc.ops.check_dsp_lp_on = skl_ipc_check_D0i0;
580 skl->boot_complete = false;
581 init_waitqueue_head(&skl->boot_wait);
582 INIT_DELAYED_WORK(&skl->d0i3.work, bxt_set_dsp_D0i3);
583 skl->d0i3.state = SKL_DSP_D0I3_NONE;
589 int bxt_sst_init_fw(struct device *dev, struct skl_dev *skl)
592 struct sst_dsp *sst = skl->dsp;
602 if (skl->lib_count > 1) {
603 ret = sst->fw_ops.load_library(sst, skl->lib_info,
604 skl->lib_count);
610 skl->is_first_boot = false;
616 void bxt_sst_dsp_cleanup(struct device *dev, struct skl_dev *skl)
619 skl_release_library(skl->lib_info, skl->lib_count);
620 if (skl->dsp->fw)
621 release_firmware(skl->dsp->fw);
622 skl_freeup_uuid_list(skl);
623 skl_ipc_free(&skl->ipc);
624 skl->dsp->ops->free(skl->dsp);