Lines Matching refs:rate
52 static int byt_wm5102_prepare_and_enable_pll1(struct snd_soc_dai *codec_dai, int rate)
55 int sr_mult = ((rate % 4000) == 0) ?
56 (WM5102_MAX_SYSCLK_4K / rate) :
57 (WM5102_MAX_SYSCLK_11025 / rate);
66 MCLK_FREQ, rate * sr_mult);
73 ARIZONA_CLK_SRC_FLL1, rate * sr_mult,
81 rate * 512, SND_SOC_CLOCK_IN);
219 * To change the rate we must disable the clock first to cover these
230 dev_err(card->dev, "Error setting MCLK rate: %d\n", ret);
252 struct snd_interval *rate = hw_param_interval(params,
258 /* The DSP will convert the FE rate to 48k, stereo */
259 rate->min = 48000;
260 rate->max = 48000;