Lines Matching refs:ctrl

259 	struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control;
266 pos = &ctrl->upos;
271 pos = &ctrl->qpos;
290 ctrl->subcode[*pos++] = val >> 16;
291 ctrl->subcode[*pos++] = val >> 8;
292 ctrl->subcode[*pos++] = val;
298 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control;
304 if (ctrl->qpos == 0)
308 ctrl->ready_buf = (ctrl->qpos - 1) / SPDIF_QSUB_SIZE + 1;
314 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control;
326 ctrl->ready_buf = 0;
327 ctrl->upos = 0;
328 ctrl->qpos = 0;
439 static void spdif_set_cstatus(struct spdif_mixer_control *ctrl,
442 ctrl->ch_status[3] &= ~mask;
443 ctrl->ch_status[3] |= cstatus & mask;
448 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control;
453 ch_status = (bitrev8(ctrl->ch_status[0]) << 16) |
454 (bitrev8(ctrl->ch_status[1]) << 8) |
455 bitrev8(ctrl->ch_status[2]);
460 ch_status = bitrev8(ctrl->ch_status[3]) << 16;
466 ch_status = (bitrev8(ctrl->ch_status[0]) << 24) |
467 (bitrev8(ctrl->ch_status[1]) << 16) |
468 (bitrev8(ctrl->ch_status[2]) << 8) |
469 bitrev8(ctrl->ch_status[3]);
507 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control;
590 spdif_set_cstatus(ctrl, IEC958_AES3_CON_FS, csfs);
706 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control;
725 spdif_set_cstatus(ctrl, IEC958_AES3_CON_CLOCK,
792 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control;
794 uvalue->value.iec958.status[0] = ctrl->ch_status[0];
795 uvalue->value.iec958.status[1] = ctrl->ch_status[1];
796 uvalue->value.iec958.status[2] = ctrl->ch_status[2];
797 uvalue->value.iec958.status[3] = ctrl->ch_status[3];
807 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control;
809 ctrl->ch_status[0] = uvalue->value.iec958.status[0];
810 ctrl->ch_status[1] = uvalue->value.iec958.status[1];
811 ctrl->ch_status[2] = uvalue->value.iec958.status[2];
812 ctrl->ch_status[3] = uvalue->value.iec958.status[3];
857 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control;
861 spin_lock_irqsave(&ctrl->ctl_lock, flags);
862 if (ctrl->ready_buf) {
863 int idx = (ctrl->ready_buf - 1) * SPDIF_UBITS_SIZE;
865 &ctrl->subcode[idx], SPDIF_UBITS_SIZE);
868 spin_unlock_irqrestore(&ctrl->ctl_lock, flags);
889 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control;
893 spin_lock_irqsave(&ctrl->ctl_lock, flags);
894 if (ctrl->ready_buf) {
895 int idx = (ctrl->ready_buf - 1) * SPDIF_QSUB_SIZE;
897 &ctrl->qsub[idx], SPDIF_QSUB_SIZE);
900 spin_unlock_irqrestore(&ctrl->ctl_lock, flags);
1537 struct spdif_mixer_control *ctrl;
1620 ctrl = &spdif_priv->fsl_spdif_control;
1621 spin_lock_init(&ctrl->ctl_lock);
1624 ctrl->ch_status[0] = IEC958_AES0_CON_NOT_COPYRIGHT |
1626 ctrl->ch_status[1] = IEC958_AES1_CON_DIGDIGCONV_ID;
1627 ctrl->ch_status[2] = 0x00;
1628 ctrl->ch_status[3] = IEC958_AES3_CON_FS_44100 |