Lines Matching defs:index
209 regmap_write(easrc->regmap, REG_EASRC_RRL(ctx->index),
211 regmap_write(easrc->regmap, REG_EASRC_RRH(ctx->index),
778 slot->ctx_index = ctx->index;
880 } else if ((slot0->busy && slot0->ctx_index == ctx->index) ||
881 (slot1->busy && slot1->ctx_index == ctx->index)) {
932 easrc_priv->slot[i][0].ctx_index == ctx->index) {
944 easrc_priv->slot[i][1].ctx_index == ctx->index) {
993 ret = fsl_easrc_prefilter_config(easrc, ctx->index);
998 ret = fsl_easrc_config_slot(easrc, ctx->index);
1086 fmt->width = easrc_priv->bps_iec958[ctx->index];
1142 regmap_update_bits(easrc->regmap, REG_EASRC_CC(ctx->index),
1145 regmap_update_bits(easrc->regmap, REG_EASRC_CC(ctx->index),
1148 regmap_update_bits(easrc->regmap, REG_EASRC_CC(ctx->index),
1151 regmap_update_bits(easrc->regmap, REG_EASRC_CC(ctx->index),
1156 regmap_update_bits(easrc->regmap, REG_EASRC_CC(ctx->index),
1167 regmap_update_bits(easrc->regmap, REG_EASRC_COC(ctx->index),
1170 regmap_update_bits(easrc->regmap, REG_EASRC_COC(ctx->index),
1173 regmap_update_bits(easrc->regmap, REG_EASRC_COC(ctx->index),
1176 regmap_update_bits(easrc->regmap, REG_EASRC_COC(ctx->index),
1181 regmap_update_bits(easrc->regmap, REG_EASRC_COC(ctx->index),
1185 regmap_update_bits(easrc->regmap, REG_EASRC_COC(ctx->index),
1210 regmap_update_bits(easrc->regmap, REG_EASRC_CIA(ctx->index),
1213 regmap_update_bits(easrc->regmap, REG_EASRC_CIA(ctx->index),
1216 regmap_update_bits(easrc->regmap, REG_EASRC_CIA(ctx->index),
1221 regmap_update_bits(easrc->regmap, REG_EASRC_COA(ctx->index),
1224 regmap_update_bits(easrc->regmap, REG_EASRC_COA(ctx->index),
1227 regmap_update_bits(easrc->regmap, REG_EASRC_COA(ctx->index),
1242 enum asrc_pair_index index = ASRC_INVALID_PAIR;
1257 index = i;
1261 if (index == ASRC_INVALID_PAIR) {
1269 ctx->index = index;
1271 easrc->pair[index] = ctx;
1297 fsl_easrc_release_slot(easrc, ctx->index);
1300 easrc->pair[ctx->index] = NULL;
1314 regmap_update_bits(easrc->regmap, REG_EASRC_CC(ctx->index),
1316 regmap_update_bits(easrc->regmap, REG_EASRC_COC(ctx->index),
1318 regmap_update_bits(easrc->regmap, REG_EASRC_CC(ctx->index),
1335 regmap_read(easrc->regmap, REG_EASRC_CC(ctx->index), &val);
1339 REG_EASRC_CC(ctx->index),
1342 regmap_read(easrc->regmap, REG_EASRC_SFS(ctx->index), &val);
1348 regmap_read(easrc->regmap, REG_EASRC_RDFIFO(ctx->index), &val);
1351 if (val & EASRC_IRQF_RSD(1 << ctx->index)) {
1355 EASRC_IRQF_RSD(1 << ctx->index),
1356 EASRC_IRQF_RSD(1 << ctx->index));
1366 regmap_update_bits(easrc->regmap, REG_EASRC_CC(ctx->index),
1368 regmap_update_bits(easrc->regmap, REG_EASRC_CC(ctx->index),
1370 regmap_update_bits(easrc->regmap, REG_EASRC_COC(ctx->index),
1379 enum asrc_pair_index index = ctx->index;
1383 sprintf(name, "ctx%c_%cx", index + '0', dir == IN ? 'r' : 't');
1492 ret = fsl_easrc_config_context(easrc, ctx->index);
1859 static int fsl_easrc_get_fifo_addr(u8 dir, enum asrc_pair_index index)
1861 return REG_EASRC_FIFO(dir, index);