Lines Matching defs:bclk
1282 int lrclk, bclk, mask, base;
1287 bclk = 0;
1309 bclk |= WM5100_AIF1_BCLK_MSTR;
1313 bclk |= WM5100_AIF1_BCLK_MSTR;
1325 bclk |= WM5100_AIF1_BCLK_INV;
1329 bclk |= WM5100_AIF1_BCLK_INV;
1339 WM5100_AIF1_BCLK_INV, bclk);
1402 int i, base, bclk, aif_rate, lrclk, wl, fl, sr;
1419 bclk = snd_soc_params_to_bclk(params);
1420 if (bclk < 0)
1421 return bclk;
1455 bclk, aif_rate, async ? "ASYNCCLK" : "SYSCLK");
1463 if (bclk_rates[i] >= bclk && (bclk_rates[i] % bclk == 0))
1468 bclk, aif_rate, async ? "ASYNCCLK" : "SYSCLK");
1472 bclk = i;
1473 dev_dbg(component->dev, "Setting %dHz BCLK\n", bclk_rates[bclk]);
1474 snd_soc_component_update_bits(component, base + 1, WM5100_AIF1_BCLK_FREQ_MASK, bclk);
1476 lrclk = bclk_rates[bclk] / params_rate(params);
1477 dev_dbg(component->dev, "Setting %dHz LRCLK\n", bclk_rates[bclk] / lrclk);