Lines Matching refs:ret
102 int ret;
106 ret = snd_soc_component_read(component, R_PLLCTL0);
107 if (ret < 0) {
109 "Failed to read PLL lock status (%d)\n", ret);
111 } else if (ret > 0) {
146 int ret;
151 ret = snd_soc_component_read(component, R_DACCRSTAT);
152 if (ret < 0) {
154 "Failed to read stat (%d)\n", ret);
155 return ret;
157 if (!ret)
162 ret = -EIO;
164 "dac coefficient write error (%d)\n", ret);
165 return ret;
168 ret = regmap_write(tscs42xx->regmap, R_DACCRADDR, addr);
169 if (ret < 0) {
171 "Failed to write dac ram address (%d)\n", ret);
172 return ret;
175 ret = regmap_bulk_write(tscs42xx->regmap, R_DACCRWRL,
178 if (ret < 0) {
180 "Failed to write dac ram (%d)\n", ret);
181 return ret;
192 int ret;
207 ret = -EINVAL;
209 "Unrecognized PLL output freq (%d)\n", ret);
210 return ret;
215 ret = snd_soc_component_update_bits(component, R_PLLCTL1C, mask, val);
216 if (ret < 0) {
217 dev_err(component->dev, "Failed to turn PLL on (%d)\n", ret);
223 ret = -ENOMSG;
227 ret = 0;
231 return ret;
237 int ret;
241 ret = snd_soc_component_update_bits(component, R_PLLCTL1C,
244 if (ret < 0) {
245 dev_err(component->dev, "Failed to turn PLL off (%d)\n", ret);
248 ret = snd_soc_component_update_bits(component, R_PLLCTL1C,
251 if (ret < 0) {
252 dev_err(component->dev, "Failed to turn PLL off (%d)\n", ret);
256 ret = 0;
260 return ret;
293 int ret;
305 ret = write_coeff_ram(component, tscs42xx->coeff_ram,
307 if (ret < 0) {
309 "Failed to flush coeff ram cache (%d)\n", ret);
315 ret = 0;
321 return ret;
372 int ret;
375 ret = power_up_audio_plls(component);
377 ret = power_down_audio_plls(component);
379 return ret;
388 int ret;
393 ret = write_coeff_ram(component, tscs42xx->coeff_ram, 0x00,
395 if (ret < 0)
400 ret = 0;
404 return ret;
817 int ret;
833 ret = -EINVAL;
834 dev_err(component->dev, "Unsupported format width (%d)\n", ret);
835 return ret;
837 ret = snd_soc_component_update_bits(component,
839 if (ret < 0) {
841 "Failed to set sample width (%d)\n", ret);
842 return ret;
853 int ret;
902 ret = snd_soc_component_update_bits(component,
904 if (ret < 0) {
906 "Failed to update register (%d)\n", ret);
907 return ret;
909 ret = snd_soc_component_update_bits(component,
911 if (ret < 0) {
913 "Failed to update register (%d)\n", ret);
914 return ret;
916 ret = snd_soc_component_update_bits(component,
918 if (ret < 0) {
920 "Failed to update register (%d)\n", ret);
921 return ret;
923 ret = snd_soc_component_update_bits(component,
925 if (ret < 0) {
927 "Failed to update register (%d)\n", ret);
928 return ret;
1062 int ret;
1068 ret = -EINVAL;
1070 input_freq, ret);
1071 return ret;
1075 ret = snd_soc_component_update_bits(component,
1079 if (ret < 0) {
1081 ret);
1082 return ret;
1094 int ret;
1096 ret = setup_sample_format(component, params_format(params));
1097 if (ret < 0) {
1099 ret);
1100 return ret;
1103 ret = setup_sample_rate(component, params_rate(params));
1104 if (ret < 0) {
1106 "Failed to setup sample rate (%d)\n", ret);
1107 return ret;
1115 int ret;
1117 ret = snd_soc_component_update_bits(component,
1120 if (ret < 0) {
1122 ret);
1123 return ret;
1131 int ret;
1133 ret = snd_soc_component_update_bits(component,
1136 if (ret < 0) {
1138 ret);
1139 return ret;
1147 int ret;
1149 ret = snd_soc_component_update_bits(component,
1151 if (ret < 0) {
1153 ret);
1154 return ret;
1162 int ret;
1164 ret = snd_soc_component_update_bits(component,
1166 if (ret < 0) {
1168 ret);
1169 return ret;
1178 int ret;
1182 ret = dac_mute(component);
1184 ret = adc_mute(component);
1187 ret = dac_unmute(component);
1189 ret = adc_unmute(component);
1191 return ret;
1198 int ret;
1203 ret = snd_soc_component_update_bits(component,
1205 if (ret < 0) {
1207 "Failed to set codec DAI master (%d)\n", ret);
1208 return ret;
1212 ret = -EINVAL;
1213 dev_err(component->dev, "Unsupported format (%d)\n", ret);
1214 return ret;
1226 int ret = 0;
1239 dev_err(component->dev, "Unsupported bclk ratio (%d)\n", ret);
1243 ret = snd_soc_component_update_bits(component,
1245 if (ret < 0) {
1247 "Failed to set DAC BCLK ratio (%d)\n", ret);
1248 return ret;
1250 ret = snd_soc_component_update_bits(component,
1252 if (ret < 0) {
1254 "Failed to set ADC BCLK ratio (%d)\n", ret);
1255 return ret;
1277 int ret;
1280 ret = regmap_read(tscs42xx->regmap, R_DEVIDH, ®);
1281 if (ret < 0)
1282 return ret;
1285 ret = regmap_read(tscs42xx->regmap, R_DEVIDL, ®);
1286 if (ret < 0)
1287 return ret;
1304 int ret;
1309 ret = snd_soc_component_write(component, R_PLLREFSEL,
1312 if (ret < 0) {
1315 ret);
1316 return ret;
1320 ret = snd_soc_component_write(component, R_PLLREFSEL,
1323 if (ret < 0) {
1325 "Failed to set PLL reference (%d)\n", ret);
1326 return ret;
1335 ret = set_pll_ctl_from_input_freq(component, freq);
1336 if (ret < 0) {
1338 "Failed to setup PLL input freq (%d)\n", ret);
1339 return ret;
1415 int ret;
1419 ret = -ENOMEM;
1421 "Failed to allocate memory for data (%d)\n", ret);
1422 return ret;
1431 ret = PTR_ERR(tscs42xx->sysclk);
1432 dev_err(&i2c->dev, "Failed to get sysclk (%d)\n", ret);
1433 return ret;
1437 ret = -EINVAL;
1439 ret);
1440 return ret;
1446 ret = PTR_ERR(tscs42xx->regmap);
1447 dev_err(&i2c->dev, "Failed to allocate regmap (%d)\n", ret);
1448 return ret;
1453 ret = part_is_valid(tscs42xx);
1454 if (ret <= 0) {
1455 dev_err(&i2c->dev, "No valid part (%d)\n", ret);
1456 ret = -ENODEV;
1457 return ret;
1460 ret = regmap_write(tscs42xx->regmap, R_RESET, RV_RESET_ENABLE);
1461 if (ret < 0) {
1462 dev_err(&i2c->dev, "Failed to reset device (%d)\n", ret);
1463 return ret;
1466 ret = regmap_register_patch(tscs42xx->regmap, tscs42xx_patch,
1468 if (ret < 0) {
1469 dev_err(&i2c->dev, "Failed to apply patch (%d)\n", ret);
1470 return ret;
1477 ret = devm_snd_soc_register_component(&i2c->dev,
1479 if (ret) {
1480 dev_err(&i2c->dev, "Failed to register codec (%d)\n", ret);
1481 return ret;