Lines Matching refs:rt5682s

3 // rt5682s.c  --  RT5682I-VS ALSA SoC audio component driver
28 #include <sound/rt5682s.h>
30 #include "rt5682s.h"
64 static void rt5682s_apply_patch_list(struct rt5682s_priv *rt5682s,
69 ret = regmap_multi_reg_write(rt5682s->regmap, patch_list, ARRAY_SIZE(patch_list));
622 static void rt5682s_reset(struct rt5682s_priv *rt5682s)
624 regmap_write(rt5682s->regmap, RT5682S_RESET, 0);
649 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
651 mutex_lock(&rt5682s->sar_mutex);
698 mutex_unlock(&rt5682s->sar_mutex);
742 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
809 if (!rt5682s->wclk_enabled) {
830 struct rt5682s_priv *rt5682s =
835 if (!rt5682s->component ||
836 !snd_soc_card_is_instantiated(rt5682s->component->card)) {
839 &rt5682s->jack_detect_work, msecs_to_jiffies(15));
843 dapm = snd_soc_component_get_dapm(rt5682s->component);
846 mutex_lock(&rt5682s->calibrate_mutex);
847 mutex_lock(&rt5682s->wclk_mutex);
849 val = snd_soc_component_read(rt5682s->component, RT5682S_AJD1_CTRL)
853 if (rt5682s->jack_type == 0) {
855 rt5682s->jack_type = rt5682s_headset_detect(rt5682s->component, 1);
856 rt5682s->irq_work_delay_time = 0;
857 } else if ((rt5682s->jack_type & SND_JACK_HEADSET) == SND_JACK_HEADSET) {
859 rt5682s->jack_type = SND_JACK_HEADSET;
860 btn_type = rt5682s_button_detect(rt5682s->component);
862 * rt5682s can report three kinds of button behavior,
872 rt5682s->jack_type |= SND_JACK_BTN_0;
877 rt5682s->jack_type |= SND_JACK_BTN_1;
882 rt5682s->jack_type |= SND_JACK_BTN_2;
887 rt5682s->jack_type |= SND_JACK_BTN_3;
892 dev_err(rt5682s->component->dev,
899 rt5682s->jack_type = rt5682s_headset_detect(rt5682s->component, 0);
900 rt5682s->irq_work_delay_time = 50;
903 mutex_unlock(&rt5682s->wclk_mutex);
904 mutex_unlock(&rt5682s->calibrate_mutex);
907 snd_soc_jack_report(rt5682s->hs_jack, rt5682s->jack_type,
911 if (rt5682s->jack_type & (SND_JACK_BTN_0 | SND_JACK_BTN_1 |
913 schedule_delayed_work(&rt5682s->jd_check_work, 0);
915 cancel_delayed_work_sync(&rt5682s->jd_check_work);
920 struct rt5682s_priv *rt5682s =
923 if (snd_soc_component_read(rt5682s->component, RT5682S_AJD1_CTRL) & RT5682S_JDH_RS_MASK) {
925 schedule_delayed_work(&rt5682s->jack_detect_work, 0);
927 schedule_delayed_work(&rt5682s->jd_check_work, 500);
933 struct rt5682s_priv *rt5682s = data;
935 mod_delayed_work(system_power_efficient_wq, &rt5682s->jack_detect_work,
936 msecs_to_jiffies(rt5682s->irq_work_delay_time));
944 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
947 rt5682s->hs_jack = hs_jack;
950 regmap_update_bits(rt5682s->regmap, RT5682S_IRQ_CTRL_2,
952 regmap_update_bits(rt5682s->regmap, RT5682S_RC_CLK_CTRL,
954 cancel_delayed_work_sync(&rt5682s->jack_detect_work);
959 switch (rt5682s->pdata.jd_src) {
961 regmap_update_bits(rt5682s->regmap, RT5682S_CBJ_CTRL_5,
963 regmap_update_bits(rt5682s->regmap, RT5682S_CBJ_CTRL_2,
965 regmap_update_bits(rt5682s->regmap, RT5682S_CBJ_CTRL_1,
970 regmap_update_bits(rt5682s->regmap, RT5682S_SAR_IL_CMD_1,
972 regmap_update_bits(rt5682s->regmap, RT5682S_GPIO_CTRL_1,
974 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_ANLG_3,
976 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_ANLG_2,
978 regmap_update_bits(rt5682s->regmap, RT5682S_RC_CLK_CTRL,
980 regmap_update_bits(rt5682s->regmap, RT5682S_IRQ_CTRL_2,
983 regmap_update_bits(rt5682s->regmap, RT5682S_4BTN_IL_CMD_4,
986 regmap_update_bits(rt5682s->regmap, RT5682S_4BTN_IL_CMD_5,
989 regmap_update_bits(rt5682s->regmap, RT5682S_4BTN_IL_CMD_6,
992 regmap_update_bits(rt5682s->regmap, RT5682S_4BTN_IL_CMD_7,
997 &rt5682s->jack_detect_work, msecs_to_jiffies(250));
1001 regmap_update_bits(rt5682s->regmap, RT5682S_IRQ_CTRL_2,
1003 regmap_update_bits(rt5682s->regmap, RT5682S_RC_CLK_CTRL,
1084 static int rt5682s_div_sel(struct rt5682s_priv *rt5682s,
1089 if (rt5682s->sysclk < target) {
1090 dev_err(rt5682s->component->dev,
1091 "sysclk rate %d is too low\n", rt5682s->sysclk);
1096 dev_dbg(rt5682s->component->dev, "div[%d]=%d\n", i, div[i]);
1097 if (target * div[i] == rt5682s->sysclk)
1099 if (target * div[i + 1] > rt5682s->sysclk) {
1100 dev_dbg(rt5682s->component->dev,
1101 "can't find div for sysclk %d\n", rt5682s->sysclk);
1106 if (target * div[i] < rt5682s->sysclk)
1107 dev_err(rt5682s->component->dev,
1108 "sysclk rate %d is too high\n", rt5682s->sysclk);
1143 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
1147 if (rt5682s->pdata.dmic_clk_rate)
1148 dmic_clk_rate = rt5682s->pdata.dmic_clk_rate;
1150 idx = rt5682s_div_sel(rt5682s, dmic_clk_rate, div, ARRAY_SIZE(div));
1159 static int rt5682s_set_pllb_power(struct rt5682s_priv *rt5682s, int on)
1161 struct snd_soc_component *component = rt5682s->component;
1182 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
1185 if (rt5682s->wclk_enabled)
1191 rt5682s_set_pllb_power(rt5682s, on);
1196 static void rt5682s_set_filter_clk(struct rt5682s_priv *rt5682s, int reg, int ref)
1198 struct snd_soc_component *component = rt5682s->component;
1203 idx = rt5682s_div_sel(rt5682s, ref, div_f, ARRAY_SIZE(div_f));
1210 if (rt5682s->sysclk <= 12288000 * div_o[idx])
1223 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
1230 ref = 256 * rt5682s->lrck[RT5682S_AIF2];
1232 ref = 256 * rt5682s->lrck[RT5682S_AIF1];
1239 rt5682s_set_filter_clk(rt5682s, reg, ref);
1248 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
1251 if (rt5682s->pdata.dmic_delay)
1252 delay = rt5682s->pdata.dmic_delay;
1268 if (!rt5682s->jack_type && !rt5682s->wclk_enabled) {
1278 static void rt5682s_set_i2s(struct rt5682s_priv *rt5682s, int id, int on)
1280 struct snd_soc_component *component = rt5682s->component;
1301 if (on && rt5682s->master[id]) {
1302 pre_div = get_clk_info(rt5682s->sysclk, rt5682s->lrck[id]);
1309 rt5682s->lrck[id], pre_div, id);
1320 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
1326 if (!strcmp(w->name, "I2S1") && !rt5682s->wclk_enabled)
1327 rt5682s_set_i2s(rt5682s, RT5682S_AIF1, on);
1329 rt5682s_set_i2s(rt5682s, RT5682S_AIF2, on);
1338 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
1340 if ((rt5682s->sysclk_src == RT5682S_CLK_SRC_PLL1) ||
1341 (rt5682s->sysclk_src == RT5682S_CLK_SRC_PLL2 && rt5682s->pll_comb == USE_PLLAB))
1351 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
1353 if (rt5682s->sysclk_src == RT5682S_CLK_SRC_PLL2)
1437 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
1440 if (rt5682s->pdata.amic_delay)
1441 delay = rt5682s->pdata.amic_delay;
1462 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
1464 if ((rt5682s->jack_type & SND_JACK_HEADSET) != SND_JACK_HEADSET)
2064 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2068 rt5682s->lrck[dai->id] = params_rate(params);
2131 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2136 rt5682s->master[dai->id] = 1;
2139 rt5682s->master[dai->id] = 0;
2196 tdm_ctrl | rt5682s->master[dai->id]);
2199 if (rt5682s->master[dai->id] == 0)
2215 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2218 if (freq == rt5682s->sysclk && clk_id == rt5682s->sysclk_src)
2246 rt5682s->sysclk = freq;
2247 rt5682s->sysclk_src = clk_id;
2333 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2336 if (source == rt5682s->pll_src[pll_id] && freq_in == rt5682s->pll_in[pll_id] &&
2337 freq_out == rt5682s->pll_out[pll_id])
2342 rt5682s->pll_in[pll_id] = 0;
2343 rt5682s->pll_out[pll_id] = 0;
2363 rt5682s->pll_comb = find_pll_inter_combination(freq_in, freq_out,
2366 if ((pll_id == RT5682S_PLL1 && rt5682s->pll_comb == USE_PLLA) ||
2367 (pll_id == RT5682S_PLL2 && (rt5682s->pll_comb == USE_PLLB ||
2368 rt5682s->pll_comb == USE_PLLAB))) {
2371 pll_id + 1, freq_in, freq_out, rt5682s->pll_comb);
2375 pll_id + 1, freq_in, freq_out, rt5682s->pll_comb);
2379 if (rt5682s->pll_comb == USE_PLLA || rt5682s->pll_comb == USE_PLLAB) {
2395 if (rt5682s->pll_comb == USE_PLLB || rt5682s->pll_comb == USE_PLLAB) {
2415 if (rt5682s->pll_comb == USE_PLLB)
2419 rt5682s->pll_in[pll_id] = freq_in;
2420 rt5682s->pll_out[pll_id] = freq_out;
2421 rt5682s->pll_src[pll_id] = source;
2430 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2432 rt5682s->bclk[dai->id] = ratio;
2462 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2464 rt5682s->bclk[dai->id] = ratio;
2486 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2490 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_DIG_1,
2495 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_DIG_1,
2499 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_DIG_1, RT5682S_PWR_LDO, 0);
2500 if (!rt5682s->wclk_enabled)
2501 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_DIG_1,
2516 static bool rt5682s_clk_check(struct rt5682s_priv *rt5682s)
2518 if (!rt5682s->master[RT5682S_AIF1]) {
2519 dev_dbg(rt5682s->component->dev, "dai clk fmt not set correctly\n");
2527 struct rt5682s_priv *rt5682s =
2529 struct snd_soc_component *component = rt5682s->component;
2532 if (!rt5682s_clk_check(rt5682s))
2535 mutex_lock(&rt5682s->wclk_mutex);
2547 rt5682s_set_i2s(rt5682s, RT5682S_AIF1, 1);
2551 ref = 256 * rt5682s->lrck[RT5682S_AIF1];
2552 rt5682s_set_filter_clk(rt5682s, reg, ref);
2553 rt5682s_set_pllb_power(rt5682s, 1);
2555 rt5682s->wclk_enabled = 1;
2557 mutex_unlock(&rt5682s->wclk_mutex);
2564 struct rt5682s_priv *rt5682s =
2566 struct snd_soc_component *component = rt5682s->component;
2568 if (!rt5682s_clk_check(rt5682s))
2571 mutex_lock(&rt5682s->wclk_mutex);
2573 if (!rt5682s->jack_type)
2578 rt5682s_set_i2s(rt5682s, RT5682S_AIF1, 0);
2583 rt5682s_set_pllb_power(rt5682s, 0);
2585 rt5682s->wclk_enabled = 0;
2587 mutex_unlock(&rt5682s->wclk_mutex);
2593 struct rt5682s_priv *rt5682s =
2595 struct snd_soc_component *component = rt5682s->component;
2598 if (!rt5682s_clk_check(rt5682s))
2603 if (rt5682s->lrck[RT5682S_AIF1] != CLK_48 &&
2604 rt5682s->lrck[RT5682S_AIF1] != CLK_44) {
2610 return rt5682s->lrck[RT5682S_AIF1];
2616 struct rt5682s_priv *rt5682s =
2618 struct snd_soc_component *component = rt5682s->component;
2621 if (!rt5682s_clk_check(rt5682s))
2639 struct rt5682s_priv *rt5682s =
2641 struct snd_soc_component *component = rt5682s->component;
2646 if (!rt5682s_clk_check(rt5682s))
2677 rt5682s->lrck[RT5682S_AIF1] = rate;
2685 struct rt5682s_priv *rt5682s =
2687 struct snd_soc_component *component = rt5682s->component;
2725 struct rt5682s_priv *rt5682s =
2729 if (!*parent_rate || !rt5682s_clk_check(rt5682s))
2747 struct rt5682s_priv *rt5682s =
2749 struct snd_soc_component *component = rt5682s->component;
2753 if (!rt5682s_clk_check(rt5682s))
2785 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2786 struct rt5682s_platform_data *pdata = &rt5682s->pdata;
2795 dai_clk_hw = &rt5682s->dai_clks_hw[i];
2800 if (rt5682s->mclk) {
2810 parent = &rt5682s->dai_clks_hw[RT5682S_DAI_WCLK_IDX];
2845 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2849 rt5682s->mclk = devm_clk_get_optional(component->dev, "mclk");
2850 if (IS_ERR(rt5682s->mclk))
2851 return PTR_ERR(rt5682s->mclk);
2859 rt5682s->lrck[RT5682S_AIF1] = CLK_48;
2872 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2874 rt5682s->component = component;
2881 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2883 rt5682s_reset(rt5682s);
2889 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2891 if (rt5682s->irq)
2892 disable_irq(rt5682s->irq);
2894 cancel_delayed_work_sync(&rt5682s->jack_detect_work);
2895 cancel_delayed_work_sync(&rt5682s->jd_check_work);
2897 if (rt5682s->hs_jack)
2898 rt5682s->jack_type = rt5682s_headset_detect(component, 0);
2900 regcache_cache_only(rt5682s->regmap, true);
2901 regcache_mark_dirty(rt5682s->regmap);
2908 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
2910 regcache_cache_only(rt5682s->regmap, false);
2911 regcache_sync(rt5682s->regmap);
2913 if (rt5682s->hs_jack) {
2915 &rt5682s->jack_detect_work, msecs_to_jiffies(0));
2918 if (rt5682s->irq)
2919 enable_irq(rt5682s->irq);
2960 static int rt5682s_parse_dt(struct rt5682s_priv *rt5682s, struct device *dev)
2963 &rt5682s->pdata.dmic1_data_pin);
2965 &rt5682s->pdata.dmic1_clk_pin);
2967 &rt5682s->pdata.jd_src);
2969 &rt5682s->pdata.dmic_clk_rate);
2971 &rt5682s->pdata.dmic_delay);
2973 &rt5682s->pdata.amic_delay);
2976 rt5682s->pdata.dai_clk_names,
2979 rt5682s->pdata.dai_clk_names[RT5682S_DAI_WCLK_IDX],
2980 rt5682s->pdata.dai_clk_names[RT5682S_DAI_BCLK_IDX]);
2982 rt5682s->pdata.dmic_clk_driving_high = device_property_read_bool(dev,
2988 static void rt5682s_calibrate(struct rt5682s_priv *rt5682s)
2992 mutex_lock(&rt5682s->calibrate_mutex);
2994 regmap_write(rt5682s->regmap, RT5682S_PWR_ANLG_1, 0xaa80);
2996 regmap_write(rt5682s->regmap, RT5682S_PWR_ANLG_1, 0xfa80);
2997 regmap_write(rt5682s->regmap, RT5682S_PWR_DIG_1, 0x01c0);
2998 regmap_write(rt5682s->regmap, RT5682S_MICBIAS_2, 0x0380);
2999 regmap_write(rt5682s->regmap, RT5682S_GLB_CLK, 0x8000);
3000 regmap_write(rt5682s->regmap, RT5682S_ADDA_CLK_1, 0x1001);
3001 regmap_write(rt5682s->regmap, RT5682S_CHOP_DAC_2, 0x3030);
3002 regmap_write(rt5682s->regmap, RT5682S_CHOP_ADC, 0xb000);
3003 regmap_write(rt5682s->regmap, RT5682S_STO1_ADC_MIXER, 0x686c);
3004 regmap_write(rt5682s->regmap, RT5682S_CAL_REC, 0x5151);
3005 regmap_write(rt5682s->regmap, RT5682S_HP_CALIB_CTRL_2, 0x0321);
3006 regmap_write(rt5682s->regmap, RT5682S_HP_LOGIC_CTRL_2, 0x0004);
3007 regmap_write(rt5682s->regmap, RT5682S_HP_CALIB_CTRL_1, 0x7c00);
3008 regmap_write(rt5682s->regmap, RT5682S_HP_CALIB_CTRL_1, 0xfc00);
3011 regmap_read(rt5682s->regmap, RT5682S_HP_CALIB_ST_1, &value);
3019 dev_err(rt5682s->component->dev, "HP Calibration Failure\n");
3022 regmap_write(rt5682s->regmap, RT5682S_MICBIAS_2, 0x0180);
3023 regmap_write(rt5682s->regmap, RT5682S_CAL_REC, 0x5858);
3024 regmap_write(rt5682s->regmap, RT5682S_STO1_ADC_MIXER, 0xc0c4);
3025 regmap_write(rt5682s->regmap, RT5682S_HP_CALIB_CTRL_2, 0x0320);
3026 regmap_write(rt5682s->regmap, RT5682S_PWR_DIG_1, 0x00c0);
3027 regmap_write(rt5682s->regmap, RT5682S_PWR_ANLG_1, 0x0800);
3028 regmap_write(rt5682s->regmap, RT5682S_GLB_CLK, 0x0000);
3030 mutex_unlock(&rt5682s->calibrate_mutex);
3048 .name = "rt5682s-aif1",
3067 .name = "rt5682s-aif2",
3082 struct rt5682s_priv *rt5682s = data;
3083 struct device *dev = regmap_get_device(rt5682s->regmap);
3086 ret = regulator_disable(rt5682s->supplies[RT5682S_SUPPLY_AVDD].consumer);
3090 ret = regulator_disable(rt5682s->supplies[RT5682S_SUPPLY_DBVDD].consumer);
3094 ret = regulator_disable(rt5682s->supplies[RT5682S_SUPPLY_LDO1_IN].consumer);
3100 ret = regulator_disable(rt5682s->supplies[RT5682S_SUPPLY_MICVDD].consumer);
3108 struct rt5682s_priv *rt5682s;
3112 rt5682s = devm_kzalloc(&i2c->dev, sizeof(struct rt5682s_priv), GFP_KERNEL);
3113 if (!rt5682s)
3116 i2c_set_clientdata(i2c, rt5682s);
3118 rt5682s->pdata = i2s_default_platform_data;
3121 rt5682s->pdata = *pdata;
3123 rt5682s_parse_dt(rt5682s, &i2c->dev);
3125 rt5682s->regmap = devm_regmap_init_i2c(i2c, &rt5682s_regmap);
3126 if (IS_ERR(rt5682s->regmap)) {
3127 ret = PTR_ERR(rt5682s->regmap);
3132 for (i = 0; i < ARRAY_SIZE(rt5682s->supplies); i++)
3133 rt5682s->supplies[i].supply = rt5682s_supply_names[i];
3136 ARRAY_SIZE(rt5682s->supplies), rt5682s->supplies);
3142 ret = devm_add_action_or_reset(&i2c->dev, rt5682s_i2c_disable_regulators, rt5682s);
3146 ret = regulator_enable(rt5682s->supplies[RT5682S_SUPPLY_MICVDD].consumer);
3153 ret = regulator_enable(rt5682s->supplies[RT5682S_SUPPLY_AVDD].consumer);
3159 ret = regulator_enable(rt5682s->supplies[RT5682S_SUPPLY_DBVDD].consumer);
3165 ret = regulator_enable(rt5682s->supplies[RT5682S_SUPPLY_LDO1_IN].consumer);
3171 rt5682s->ldo1_en = devm_gpiod_get_optional(&i2c->dev,
3174 if (IS_ERR(rt5682s->ldo1_en)) {
3176 return PTR_ERR(rt5682s->ldo1_en);
3182 regmap_read(rt5682s->regmap, RT5682S_DEVICE_ID, &val);
3184 dev_err(&i2c->dev, "Device with ID register %x is not rt5682s\n", val);
3188 rt5682s_reset(rt5682s);
3189 rt5682s_apply_patch_list(rt5682s, &i2c->dev);
3191 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_DIG_2,
3195 mutex_init(&rt5682s->calibrate_mutex);
3196 mutex_init(&rt5682s->sar_mutex);
3197 mutex_init(&rt5682s->wclk_mutex);
3198 rt5682s_calibrate(rt5682s);
3200 regmap_update_bits(rt5682s->regmap, RT5682S_MICBIAS_2,
3203 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_ANLG_1,
3205 regmap_update_bits(rt5682s->regmap, RT5682S_HP_LOGIC_CTRL_2,
3207 regmap_update_bits(rt5682s->regmap, RT5682S_HP_CHARGE_PUMP_2,
3209 regmap_update_bits(rt5682s->regmap, RT5682S_HP_AMP_DET_CTL_1,
3213 switch (rt5682s->pdata.dmic1_data_pin) {
3217 regmap_update_bits(rt5682s->regmap, RT5682S_DMIC_CTRL_1,
3219 regmap_update_bits(rt5682s->regmap, RT5682S_GPIO_CTRL_1,
3223 regmap_update_bits(rt5682s->regmap, RT5682S_DMIC_CTRL_1,
3225 regmap_update_bits(rt5682s->regmap, RT5682S_GPIO_CTRL_1,
3234 switch (rt5682s->pdata.dmic1_clk_pin) {
3238 regmap_update_bits(rt5682s->regmap, RT5682S_GPIO_CTRL_1,
3242 regmap_update_bits(rt5682s->regmap, RT5682S_GPIO_CTRL_1,
3244 if (rt5682s->pdata.dmic_clk_driving_high)
3245 regmap_update_bits(rt5682s->regmap, RT5682S_PAD_DRIVING_CTRL,
3253 INIT_DELAYED_WORK(&rt5682s->jack_detect_work, rt5682s_jack_detect_handler);
3254 INIT_DELAYED_WORK(&rt5682s->jd_check_work, rt5682s_jd_check_handler);
3259 "rt5682s", rt5682s);
3261 rt5682s->irq = i2c->irq;
3272 struct rt5682s_priv *rt5682s = i2c_get_clientdata(client);
3275 cancel_delayed_work_sync(&rt5682s->jack_detect_work);
3276 cancel_delayed_work_sync(&rt5682s->jd_check_work);
3278 rt5682s_reset(rt5682s);
3287 {.compatible = "realtek,rt5682s"},
3299 {"rt5682s", 0},
3306 .name = "rt5682s",