Lines Matching defs:regmap
60 struct regmap *regmap;
1587 regmap_read(rt5663->regmap, RT5663_INT_ST_2, &val);
1615 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_2,
1618 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_3,
1624 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_5,
1627 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_6,
1642 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_2,
1644 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_3,
1650 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_5,
1652 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_6,
1858 dev_dbg(regmap_get_device(rt5663->regmap), "%s IRQ queue work\n",
3181 regmap_write(rt5663->regmap, RT5663_RESET, 0);
3189 regcache_cache_only(rt5663->regmap, true);
3190 regcache_mark_dirty(rt5663->regmap);
3199 regcache_cache_only(rt5663->regmap, false);
3200 regcache_sync(rt5663->regmap);
3323 regmap_write(rt5663->regmap, RT5663_BIAS_CUR_8, 0xa402);
3324 regmap_write(rt5663->regmap, RT5663_PWR_DIG_1, 0x0100);
3325 regmap_write(rt5663->regmap, RT5663_RECMIX, 0x4040);
3326 regmap_write(rt5663->regmap, RT5663_DIG_MISC, 0x0001);
3327 regmap_write(rt5663->regmap, RT5663_RC_CLK, 0x0380);
3328 regmap_write(rt5663->regmap, RT5663_GLB_CLK, 0x8000);
3329 regmap_write(rt5663->regmap, RT5663_ADDA_CLK_1, 0x1000);
3330 regmap_write(rt5663->regmap, RT5663_CHOP_DAC_L, 0x3030);
3331 regmap_write(rt5663->regmap, RT5663_CALIB_ADC, 0x3c05);
3332 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xa23e);
3334 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xf23e);
3335 regmap_write(rt5663->regmap, RT5663_HP_CALIB_2, 0x0321);
3336 regmap_write(rt5663->regmap, RT5663_HP_CALIB_1, 0xfc00);
3344 regmap_write(rt5663->regmap, RT5663_RESET, 0x0000);
3346 regmap_write(rt5663->regmap, RT5663_ANA_BIAS_CUR_4, 0x00a1);
3347 regmap_write(rt5663->regmap, RT5663_RC_CLK, 0x0380);
3348 regmap_write(rt5663->regmap, RT5663_GLB_CLK, 0x8000);
3349 regmap_write(rt5663->regmap, RT5663_ADDA_CLK_1, 0x1000);
3350 regmap_write(rt5663->regmap, RT5663_VREF_RECMIX, 0x0032);
3351 regmap_write(rt5663->regmap, RT5663_HP_IMP_SEN_19, 0x000c);
3352 regmap_write(rt5663->regmap, RT5663_DUMMY_1, 0x0324);
3353 regmap_write(rt5663->regmap, RT5663_DIG_MISC, 0x8001);
3354 regmap_write(rt5663->regmap, RT5663_VREFADJ_OP, 0x0f28);
3355 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xa23b);
3357 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xf23b);
3358 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_2, 0x8000);
3359 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_3, 0x0008);
3360 regmap_write(rt5663->regmap, RT5663_PRE_DIV_GATING_1, 0xffff);
3361 regmap_write(rt5663->regmap, RT5663_PRE_DIV_GATING_2, 0xffff);
3362 regmap_write(rt5663->regmap, RT5663_CBJ_1, 0x8c10);
3363 regmap_write(rt5663->regmap, RT5663_IL_CMD_2, 0x00c1);
3364 regmap_write(rt5663->regmap, RT5663_EM_JACK_TYPE_1, 0xb880);
3365 regmap_write(rt5663->regmap, RT5663_EM_JACK_TYPE_2, 0x4110);
3366 regmap_write(rt5663->regmap, RT5663_EM_JACK_TYPE_2, 0x4118);
3370 regmap_read(rt5663->regmap, RT5663_INT_ST_2, &value);
3380 regmap_write(rt5663->regmap, RT5663_HP_IMP_SEN_19, 0x0000);
3381 regmap_write(rt5663->regmap, RT5663_DEPOP_2, 0x3003);
3382 regmap_write(rt5663->regmap, RT5663_DEPOP_1, 0x0038);
3383 regmap_write(rt5663->regmap, RT5663_DEPOP_1, 0x003b);
3384 regmap_write(rt5663->regmap, RT5663_PWR_DIG_2, 0x8400);
3385 regmap_write(rt5663->regmap, RT5663_PWR_DIG_1, 0x8df8);
3386 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_2, 0x8003);
3387 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_3, 0x018c);
3388 regmap_write(rt5663->regmap, RT5663_HP_CHARGE_PUMP_1, 0x1e32);
3389 regmap_write(rt5663->regmap, RT5663_DUMMY_2, 0x8089);
3390 regmap_write(rt5663->regmap, RT5663_DACREF_LDO, 0x3b0b);
3392 regmap_write(rt5663->regmap, RT5663_STO_DAC_MIXER, 0x0000);
3393 regmap_write(rt5663->regmap, RT5663_BYPASS_STO_DAC, 0x000c);
3394 regmap_write(rt5663->regmap, RT5663_HP_BIAS, 0xafaa);
3395 regmap_write(rt5663->regmap, RT5663_CHARGE_PUMP_1, 0x2224);
3396 regmap_write(rt5663->regmap, RT5663_HP_OUT_EN, 0x8088);
3397 regmap_write(rt5663->regmap, RT5663_STO_DRE_9, 0x0017);
3398 regmap_write(rt5663->regmap, RT5663_STO_DRE_10, 0x0017);
3399 regmap_write(rt5663->regmap, RT5663_STO1_ADC_MIXER, 0x4040);
3400 regmap_write(rt5663->regmap, RT5663_CHOP_ADC, 0x3000);
3401 regmap_write(rt5663->regmap, RT5663_RECMIX, 0x0005);
3402 regmap_write(rt5663->regmap, RT5663_ADDA_RST, 0xc000);
3403 regmap_write(rt5663->regmap, RT5663_STO1_HPF_ADJ1, 0x3320);
3404 regmap_write(rt5663->regmap, RT5663_HP_CALIB_2, 0x00c9);
3405 regmap_write(rt5663->regmap, RT5663_DUMMY_1, 0x004c);
3406 regmap_write(rt5663->regmap, RT5663_ANA_BIAS_CUR_1, 0x1111);
3407 regmap_write(rt5663->regmap, RT5663_BIAS_CUR_8, 0x4402);
3408 regmap_write(rt5663->regmap, RT5663_CHARGE_PUMP_2, 0x3311);
3409 regmap_write(rt5663->regmap, RT5663_HP_CALIB_1, 0x0069);
3410 regmap_write(rt5663->regmap, RT5663_HP_CALIB_3, 0x06ce);
3411 regmap_write(rt5663->regmap, RT5663_HP_CALIB_1_1, 0x6800);
3412 regmap_write(rt5663->regmap, RT5663_CHARGE_PUMP_2, 0x1100);
3413 regmap_write(rt5663->regmap, RT5663_HP_CALIB_7, 0x0057);
3414 regmap_write(rt5663->regmap, RT5663_HP_CALIB_1_1, 0xe800);
3418 regmap_read(rt5663->regmap, RT5663_HP_CALIB_1_1, &value);
3429 regmap_write(rt5663->regmap, RT5663_HP_CALIB_1_1, 0x6200);
3430 regmap_write(rt5663->regmap, RT5663_HP_CALIB_7, 0x0059);
3431 regmap_write(rt5663->regmap, RT5663_HP_CALIB_1_1, 0xe200);
3435 regmap_read(rt5663->regmap, RT5663_HP_CALIB_1_1, &value);
3446 regmap_write(rt5663->regmap, RT5663_EM_JACK_TYPE_1, 0xb8e0);
3448 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0x003b);
3450 regmap_write(rt5663->regmap, RT5663_PWR_DIG_1, 0x0000);
3452 regmap_write(rt5663->regmap, RT5663_DEPOP_1, 0x000b);
3454 regmap_write(rt5663->regmap, RT5663_DEPOP_1, 0x0008);
3456 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_2, 0x0000);
3498 struct regmap *regmap;
3548 regmap = devm_regmap_init_i2c(i2c, &temp_regmap);
3549 if (IS_ERR(regmap)) {
3550 ret = PTR_ERR(regmap);
3556 ret = regmap_read(regmap, RT5663_VENDOR_ID_2, &val);
3562 regmap_read(regmap, RT5663_VENDOR_ID_2, &val);
3567 rt5663->regmap = devm_regmap_init_i2c(i2c, &rt5663_v2_regmap);
3571 rt5663->regmap = devm_regmap_init_i2c(i2c, &rt5663_regmap);
3582 if (IS_ERR(rt5663->regmap)) {
3583 ret = PTR_ERR(rt5663->regmap);
3590 regmap_write(rt5663->regmap, RT5663_RESET, 0);
3591 regcache_cache_bypass(rt5663->regmap, true);
3602 regcache_cache_bypass(rt5663->regmap, false);
3603 regmap_write(rt5663->regmap, RT5663_RESET, 0);
3610 ret = regmap_register_patch(rt5663->regmap, rt5663_patch_list,
3614 "Failed to apply regmap patch: %d\n", ret);
3621 regmap_update_bits(rt5663->regmap, RT5663_GPIO_1, RT5663_GP1_PIN_MASK,
3624 regmap_update_bits(rt5663->regmap, RT5663_IL_CMD_5,
3629 regmap_write(rt5663->regmap, RT5663_BIAS_CUR_8, 0xa402);
3631 regmap_update_bits(rt5663->regmap, RT5663_AUTO_1MRC_CLK,
3634 regmap_update_bits(rt5663->regmap, RT5663_PWR_ANLG_2,
3636 regmap_update_bits(rt5663->regmap, RT5663_IRQ_1,
3639 regmap_update_bits(rt5663->regmap, RT5663_HP_LOGIC_2,
3641 regmap_update_bits(rt5663->regmap, RT5663_RECMIX,
3646 regmap_update_bits(rt5663->regmap, RT5663_GPIO_2,
3648 regmap_update_bits(rt5663->regmap, RT5663_GPIO_3,
3650 regmap_update_bits(rt5663->regmap, RT5663_PWR_ANLG_1,
3655 regmap_update_bits(rt5663->regmap, RT5663_DIG_MISC,
3657 regmap_update_bits(rt5663->regmap, RT5663_AUTO_1MRC_CLK,
3659 regmap_update_bits(rt5663->regmap, RT5663_IRQ_1,
3661 regmap_update_bits(rt5663->regmap, RT5663_GPIO_1,
3663 regmap_write(rt5663->regmap, RT5663_VREF_RECMIX, 0x0032);
3664 regmap_update_bits(rt5663->regmap, RT5663_GPIO_2,
3667 regmap_update_bits(rt5663->regmap, RT5663_RECMIX,
3669 regmap_update_bits(rt5663->regmap, RT5663_TDM_2,
3727 regmap_write(rt5663->regmap, RT5663_RESET, 0);