Lines Matching defs:RT1305_PR_BASE
34 #define RT1305_PR_BASE (RT1305_PR_RANGE_BASE + (0 * RT1305_PR_SPACING))
40 .range_min = RT1305_PR_BASE,
41 .range_max = RT1305_PR_BASE + 0xff,
53 { RT1305_PR_BASE + 0xcf, 0x5548 },
54 { RT1305_PR_BASE + 0x5d, 0x0442 },
55 { RT1305_PR_BASE + 0xc1, 0x0320 },
1000 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xcf, 0x5548);
1001 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc1, 0x0320);
1010 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x5d, 0x0442);
1013 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc3, 0xd4a0);
1014 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xcc, 0x00cc);
1015 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc1, 0x0320);
1019 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x06, 0x00c0);
1031 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x06, 0x0000);
1043 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x5d, 0x9542);
1050 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x50, 0x0064);
1051 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x51, 0x0770);
1052 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x52, 0xc30c);
1054 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xfb00);
1055 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xff80);
1057 regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x55, &rh);
1058 regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x56, &rl);
1071 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xfb00);
1072 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xff80);
1074 regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x55, &rh);
1075 regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x56, &rl);
1091 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x4e,
1093 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x4f,
1095 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xfe,
1097 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xfd,
1106 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x5d, 0x0442);