Lines Matching refs:regmap

26 #include <linux/regmap.h>
80 		regmap_update_bits(priv->regmap,
86 			regmap_update_bits(priv->regmap,
92 			regmap_update_bits(priv->regmap,
100 			regmap_update_bits(priv->regmap,
113 		regmap_update_bits(priv->regmap,
118 		regmap_update_bits(priv->regmap,
126 			regmap_update_bits(priv->regmap,
131 			regmap_update_bits(priv->regmap,
162 		regmap_update_bits(priv->regmap, RG_ACCDETSPARE_ADDR,
168 			regmap_update_bits(priv->regmap,
173 			regmap_update_bits(priv->regmap,
177 		regmap_update_bits(priv->regmap, RG_EINT0HIRENB_ADDR,
185 		regmap_update_bits(priv->regmap,
189 		regmap_update_bits(priv->regmap,
197 			regmap_update_bits(priv->regmap,
203 			regmap_update_bits(priv->regmap,
213 			regmap_update_bits(priv->regmap,
219 			regmap_update_bits(priv->regmap,
240 	regmap_update_bits(priv->regmap, ACCDET_IRQ_ADDR,
243 	ret = regmap_read_poll_timeout(priv->regmap,
252 	regmap_update_bits(priv->regmap, ACCDET_IRQ_ADDR,
254 	regmap_update_bits(priv->regmap, RG_INT_STATUS_ACCDET_ADDR,
277 		regmap_write(priv->regmap, ACCDET_DEBOUNCE0_ADDR, debounce);
280 		regmap_write(priv->regmap, ACCDET_DEBOUNCE1_ADDR, debounce);
283 		regmap_write(priv->regmap, ACCDET_DEBOUNCE2_ADDR, debounce);
286 		regmap_write(priv->regmap, ACCDET_DEBOUNCE3_ADDR, debounce);
289 		regmap_write(priv->regmap,
293 		regmap_update_bits(priv->regmap, ACCDET_EINT_DEBOUNCE0_ADDR,
298 		regmap_update_bits(priv->regmap, ACCDET_EINT_DEBOUNCE1_ADDR,
303 		regmap_update_bits(priv->regmap, ACCDET_EINT_DEBOUNCE2_ADDR,
308 		regmap_update_bits(priv->regmap, ACCDET_EINT_DEBOUNCE3_ADDR,
313 		regmap_write(priv->regmap, ACCDET_EINT_INVERTER_DEBOUNCE_ADDR,
373 	regmap_read(priv->regmap, ACCDET_MEM_IN_ADDR, &val);
428 		regmap_update_bits(priv->regmap, ACCDET_SEQ_INIT_ADDR,
431 		regmap_update_bits(priv->regmap, ACCDET_SEQ_INIT_ADDR,
433 		ret = regmap_read_poll_timeout(priv->regmap,
443 		regmap_update_bits(priv->regmap, ACCDET_SW_EN_ADDR,
450 		regmap_update_bits(priv->regmap, ACCDET_SW_EN_ADDR,
467 	regmap_read(priv->regmap, ACCDET_IRQ_ADDR, &irq_val);
470 		regmap_update_bits(priv->regmap, ACCDET_IRQ_ADDR,
473 		ret = regmap_read_poll_timeout(priv->regmap,
484 		regmap_update_bits(priv->regmap, ACCDET_IRQ_ADDR,
486 		regmap_update_bits(priv->regmap, RG_INT_STATUS_ACCDET_ADDR,
493 			regmap_update_bits(priv->regmap, ACCDET_IRQ_ADDR,
496 			ret = regmap_read_poll_timeout(priv->regmap,
508 			regmap_update_bits(priv->regmap, ACCDET_IRQ_ADDR,
510 			regmap_update_bits(priv->regmap,
516 			regmap_update_bits(priv->regmap, ACCDET_IRQ_ADDR,
519 			ret = regmap_read_poll_timeout(priv->regmap,
531 			regmap_update_bits(priv->regmap, ACCDET_IRQ_ADDR,
533 			regmap_update_bits(priv->regmap,
539 		regmap_read(priv->regmap, ACCDET_EINT0_MEM_IN_ADDR, &val);
687 	regmap_write(priv->regmap, ACCDET_EINT_CMPMEN_PWM_THRESH_ADDR,
692 		regmap_write(priv->regmap, ACCDET_DA_STABLE_ADDR,
695 		regmap_write(priv->regmap, ACCDET_DA_STABLE_ADDR,
699 	regmap_update_bits(priv->regmap, ACCDET_EINT_M_PLUG_IN_NUM_ADDR,
706 	regmap_write(priv->regmap, ACCDET_HWMODE_EN_ADDR, 0x100);
708 	regmap_update_bits(priv->regmap, ACCDET_EINT_M_DETECT_EN_ADDR,
712 	regmap_write(priv->regmap, ACCDET_CMP_PWM_EN_ADDR, 0x67);
717 			regmap_update_bits(priv->regmap,
722 			regmap_update_bits(priv->regmap,
729 			regmap_update_bits(priv->regmap,
734 			regmap_update_bits(priv->regmap,
747 		regmap_update_bits(priv->regmap, RG_EINT0EN_ADDR,
750 		regmap_update_bits(priv->regmap, RG_EINT1EN_ADDR,
754 	regmap_update_bits(priv->regmap, RG_ACCDETSPARE_ADDR,
757 	regmap_update_bits(priv->regmap, RG_NCP_PDDIS_EN_ADDR,
765 				regmap_update_bits(priv->regmap,
770 				regmap_update_bits(priv->regmap,
777 				regmap_update_bits(priv->regmap,
782 				regmap_update_bits(priv->regmap,
792 		regmap_update_bits(priv->regmap, RG_ACCDETSPARE_ADDR,
796 	regmap_write(priv->regmap, RG_EINTCOMPVTH_ADDR,
804 	regmap_update_bits(priv->regmap, ACCDET_SEQ_INIT_ADDR,
807 	regmap_update_bits(priv->regmap, ACCDET_SEQ_INIT_ADDR,
829 	regmap_update_bits(priv->regmap, RG_ACCDET_RST_ADDR,
831 	regmap_update_bits(priv->regmap, RG_ACCDET_RST_ADDR,
835 	regmap_update_bits(priv->regmap, RG_AUDPWDBMICBIAS1_ADDR,
837 	regmap_update_bits(priv->regmap, RG_AUDPWDBMICBIAS1_ADDR,
841 	regmap_write(priv->regmap, ACCDET_PWM_WIDTH_ADDR,
843 	regmap_write(priv->regmap, ACCDET_PWM_THRESH_ADDR,
845 	regmap_write(priv->regmap, ACCDET_RISE_DELAY_ADDR,
849 	regmap_read(priv->regmap, RG_AUDPWDBMICBIAS1_ADDR, &reg);
852 		regmap_write(priv->regmap, RG_AUDPWDBMICBIAS1_ADDR,
857 		regmap_write(priv->regmap, RG_AUDPWDBMICBIAS1_ADDR,
862 		regmap_write(priv->regmap, RG_AUDPWDBMICBIAS1_ADDR,
867 	regmap_read(priv->regmap, RG_AUDACCDETMICBIAS0PULLLOW_ADDR, &reg);
870 		regmap_write(priv->regmap, RG_AUDACCDETMICBIAS0PULLLOW_ADDR,
873 		regmap_update_bits(priv->regmap, RG_ANALOGFDEN_ADDR,
876 		regmap_update_bits(priv->regmap, RG_ACCDETSPARE_ADDR,
880 		regmap_write(priv->regmap, RG_AUDACCDETMICBIAS0PULLLOW_ADDR,
883 		regmap_update_bits(priv->regmap, RG_ANALOGFDEN_ADDR,
890 		regmap_write(priv->regmap, RG_AUDACCDETMICBIAS0PULLLOW_ADDR,
892 		regmap_update_bits(priv->regmap, RG_AUDPWDBMICBIAS1_ADDR,
896 		regmap_update_bits(priv->regmap, RG_ANALOGFDEN_ADDR,
951 	priv->regmap = mt6397->regmap;
952 	if (IS_ERR(priv->regmap)) {
953 		ret = PTR_ERR(priv->regmap);