Lines Matching defs:regmap
83 struct regmap *regmap;
115 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR,
117 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_SET,
119 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2,
130 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR,
132 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2,
134 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0,
141 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR,
143 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_SET,
145 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3,
157 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR,
159 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3,
161 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0,
168 regmap_update_bits(priv->regmap, MT6358_DCXO_CW14,
178 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON6,
183 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON6,
192 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13,
201 regmap_update_bits(priv->regmap, MT6358_AUD_TOP_CKPDN_CON0,
211 regmap_update_bits(priv->regmap,
215 regmap_update_bits(priv->regmap,
218 regmap_update_bits(priv->regmap,
224 regmap_update_bits(priv->regmap,
228 regmap_update_bits(priv->regmap,
235 regmap_update_bits(priv->regmap,
239 regmap_update_bits(priv->regmap,
250 regmap_update_bits(priv->regmap, MT6358_AFE_AUD_PAD_TOP,
269 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG,
272 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG,
284 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG,
287 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG,
308 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG,
311 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG,
333 regmap_write(priv->regmap, MT6358_ZCD_CON0, 0x0000);
344 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1,
346 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1,
359 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9,
371 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4,
377 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4,
413 regmap_update_bits(priv->regmap,
441 regmap_read(priv->regmap, MT6358_ZCD_CON2, ®);
448 regmap_read(priv->regmap, MT6358_ZCD_CON1, ®);
455 regmap_read(priv->regmap, MT6358_ZCD_CON3, ®);
463 regmap_read(priv->regmap, MT6358_AUDENC_ANA_CON0, ®);
466 regmap_read(priv->regmap, MT6358_AUDENC_ANA_CON1, ®);
480 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13,
482 regmap_update_bits(priv->regmap, MT6358_DCXO_CW14, 0xffff, 0xa2b5);
483 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
487 regmap_update_bits(priv->regmap, MT6358_DCXO_CW13, 0xffff, 0x9929);
488 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9,
490 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON8,
494 regmap_update_bits(priv->regmap, MT6358_AUD_TOP_CKPDN_CON0,
496 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, 0xffff, 0x0120);
497 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG0, 0xffff, 0xffff);
498 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG1, 0xffff, 0x0200);
499 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG2, 0xffff, 0x2424);
500 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG3, 0xffff, 0xdbac);
501 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG4, 0xffff, 0x029e);
502 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG5, 0xffff, 0x0000);
503 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_POSDIV_CFG0,
505 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_HPF_CFG0,
507 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_TOP, 0xffff, 0x68d1);
515 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_TOP, 0xffff, 0xc000);
516 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_HPF_CFG0,
518 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_POSDIV_CFG0,
520 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG5, 0xffff, 0x0100);
521 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG4, 0xffff, 0x006c);
522 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG3, 0xffff, 0xa879);
523 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG2, 0xffff, 0x2323);
524 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG1, 0xffff, 0x0400);
525 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG0, 0xffff, 0x0000);
526 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, 0xffff, 0x02d8);
527 regmap_update_bits(priv->regmap, MT6358_AUD_TOP_CKPDN_CON0,
531 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON8,
533 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9,
535 regmap_update_bits(priv->regmap, MT6358_DCXO_CW13, 0xffff, 0x9829);
536 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
539 regmap_update_bits(priv->regmap, MT6358_DCXO_CW14, 0xffff, 0xa2b5);
540 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13,
871 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON6,
894 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006);
896 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1);
898 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003);
900 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x000B);
902 regmap_update_bits(priv->regmap, MT6358_AFE_SGEN_CFG0,
905 regmap_update_bits(priv->regmap, MT6358_AFE_SGEN_CFG1,
911 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0000);
912 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xcba0);
936 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006);
938 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1);
940 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003);
942 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x000B);
946 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0000);
947 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xcba0);
963 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4,
967 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4000);
970 regmap_write(priv->regmap, MT6358_ZCD_CON2, DL_GAIN_N_40DB_REG);
973 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON1, 0x0001);
975 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON2, 0x002c);
977 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON0, 0x0001);
979 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON4, 0x0003);
981 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x0000);
985 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14,
988 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x0001);
995 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x3000);
998 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055);
1001 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON11, 0x4900);
1004 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055);
1006 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4033);
1009 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x000c);
1011 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x003c);
1013 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0c00);
1015 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30c0);
1017 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30f0);
1019 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x00fc);
1022 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0e00);
1024 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0200);
1028 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON10, 0x0000);
1031 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x00ff);
1038 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fcf);
1046 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fc3);
1048 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3f03);
1052 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x1);
1054 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30ff);
1056 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0xf201);
1060 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x32ff);
1062 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x3aff);
1076 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0,
1080 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9,
1084 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0,
1088 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x0);
1091 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fc3);
1093 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fcf);
1101 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fff);
1110 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3, 0x0);
1113 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0e00);
1116 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0c00);
1119 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1,
1123 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0,
1127 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0,
1131 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0000);
1134 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1,
1138 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1,
1142 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON12,
1146 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x1, 0x0);
1148 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14,
1151 regmap_update_bits(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3,
1155 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON2,
1159 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4,
1172 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4,
1176 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4000);
1179 regmap_write(priv->regmap, MT6358_ZCD_CON2, DL_GAIN_N_10DB_REG);
1182 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON1, 0x0001);
1184 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON2, 0x002c);
1186 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON0, 0x0001);
1188 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON4, 0x0003);
1190 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x0000);
1194 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14,
1197 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x0001);
1204 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x3000);
1207 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055);
1210 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON11, 0x4900);
1213 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055);
1215 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4033);
1221 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30c0);
1223 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30f0);
1225 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0200);
1229 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON10, 0x0000);
1232 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x0003);
1237 regmap_write(priv->regmap, MT6358_ZCD_CON1, DL_GAIN_N_40DB_REG);
1244 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x0110);
1246 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x0112);
1248 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x0113);
1251 regmap_update_bits(priv->regmap, MT6358_ZCD_CON1,
1255 regmap_update_bits(priv->regmap, MT6358_ZCD_CON1,
1261 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x1);
1263 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30f9);
1265 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0201);
1267 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x011b);
1269 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x35f9);
1277 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0,
1280 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7,
1284 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0,
1288 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x0);
1296 regmap_update_bits(priv->regmap, MT6358_ZCD_CON1,
1303 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3, 0x0);
1306 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fc3);
1308 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fcf);
1311 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fff);
1317 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0,
1320 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7,
1324 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0,
1327 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7,
1331 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9,
1335 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON12,
1338 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x1, 0x0);
1340 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, 0x1055, 0x0);
1342 regmap_update_bits(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x1, 0x1);
1345 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4,
1426 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4000);
1429 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON1, 0x0001);
1431 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON2, 0x002c);
1433 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON0, 0x0001);
1435 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON4, 0x0003);
1437 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x0000);
1441 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14,
1444 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x0001);
1451 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0010);
1454 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055);
1456 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON11, 0x4900);
1459 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055);
1461 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0090);
1464 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0000);
1467 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON10, 0x0000);
1470 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0092);
1472 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0093);
1475 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13,
1479 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x0009);
1481 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0001);
1483 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x009b);
1487 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6,
1492 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0,
1496 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13,
1500 regmap_write(priv->regmap, MT6358_ZCD_CON3, DL_GAIN_N_40DB);
1503 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6,
1507 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6,
1511 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9,
1515 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9,
1519 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON12,
1523 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON15,
1526 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14,
1529 regmap_update_bits(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3,
1576 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13,
1579 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON3,
1582 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14,
1585 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14,
1590 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14,
1593 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14,
1597 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON3, 0x0000);
1599 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13,
1620 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062);
1621 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062);
1622 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2060);
1623 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2061);
1624 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG1, 0x0100);
1632 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9,
1636 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9,
1640 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9,
1645 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9,
1653 regmap_write(priv->regmap,
1656 regmap_write(priv->regmap,
1662 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1664 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
1668 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1670 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
1676 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1681 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1687 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1693 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1697 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1704 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
1709 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
1715 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
1721 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
1725 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
1733 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1736 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
1740 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON3,
1748 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_H, 0x0000);
1751 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, 0x0001);
1766 regmap_update_bits(priv->regmap, MT6358_AFE_UL_SRC_CON0_L,
1773 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1776 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1779 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1783 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1787 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
1790 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
1793 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
1797 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
1802 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0000);
1805 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON10,
1810 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2060);
1812 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062);
1814 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062);
1816 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062);
1826 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0021);
1829 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON10,
1833 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON8, 0x0005);
1840 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_H, 0x0400);
1842 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_H, 0x0080);
1845 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, 0x0003);
1858 regmap_update_bits(priv->regmap, MT6358_AFE_UL_SRC_CON0_L,
1865 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON8, 0x0000);
1869 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0001);
1872 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON10,
1876 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0000);
1886 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0,
1889 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1,
2375 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0,
2378 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0,
2382 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6,
2386 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7,
2391 regmap_update_bits(priv->regmap, MT6358_ACCDET_CON13,
2395 regmap_write(priv->regmap, MT6358_DRV_CON3, 0x8888);
2407 snd_soc_component_init_regmap(cmpnt, priv->regmap);
2464 priv->regmap = mt6397->regmap;
2465 if (IS_ERR(priv->regmap))
2466 return PTR_ERR(priv->regmap);