Lines Matching defs:cmpnt

200 static void set_hp_gain_zero(struct snd_soc_component *cmpnt)
202 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON2,
204 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON2,
208 static unsigned int get_cap_reg_val(struct snd_soc_component *cmpnt,
225 dev_warn(cmpnt->dev, "%s(), error rate %d, return 3",
231 static unsigned int get_play_reg_val(struct snd_soc_component *cmpnt,
256 dev_warn(cmpnt->dev, "%s(), error rate %d, return 8",
266 struct snd_soc_component *cmpnt = dai->component;
267 struct mt6351_priv *priv = snd_soc_component_get_drvdata(cmpnt);
322 static void hp_gain_ramp_set(struct snd_soc_component *cmpnt, int hp_gain_ctl)
324 struct mt6351_priv *priv = snd_soc_component_get_drvdata(cmpnt);
349 regmap_update_bits(cmpnt->regmap,
359 static void hp_zcd_enable(struct snd_soc_component *cmpnt)
363 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x7 << 8, 0x1 << 8);
364 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x1 << 7, 0x0 << 7);
367 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x1 << 6, 0x1 << 6);
369 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x3 << 4, 0x0 << 4);
370 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x7 << 1, 0x5 << 1);
371 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x1 << 0, 0x1 << 0);
374 static void hp_zcd_disable(struct snd_soc_component *cmpnt)
376 regmap_write(cmpnt->regmap, MT6351_ZCD_CON0, 0x0000);
579 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
585 regmap_update_bits(cmpnt->regmap,
591 regmap_update_bits(cmpnt->regmap,
600 regmap_update_bits(cmpnt->regmap,
606 regmap_update_bits(cmpnt->regmap,
623 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
627 regmap_update_bits(cmpnt->regmap, MT6351_AFE_NCP_CFG1,
630 regmap_update_bits(cmpnt->regmap, MT6351_AFE_NCP_CFG0,
647 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
651 regmap_update_bits(cmpnt->regmap, MT6351_AFE_SGEN_CFG0,
653 regmap_update_bits(cmpnt->regmap, MT6351_AFE_SGEN_CFG1,
667 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
668 struct mt6351_priv *priv = snd_soc_component_get_drvdata(cmpnt);
676 regmap_update_bits(cmpnt->regmap, MT6351_AFUNC_AUD_CON2,
679 regmap_update_bits(cmpnt->regmap, MT6351_AFUNC_AUD_CON0,
682 regmap_update_bits(cmpnt->regmap, MT6351_AFUNC_AUD_CON2,
685 regmap_update_bits(cmpnt->regmap, MT6351_AFUNC_AUD_CON2,
688 regmap_update_bits(cmpnt->regmap, MT6351_AFE_DL_SDM_CON1,
691 regmap_write(cmpnt->regmap, MT6351_AFE_PMIC_NEWIF_CFG0,
692 (get_play_reg_val(cmpnt, priv->dl_rate) << 12) |
694 regmap_write(cmpnt->regmap, MT6351_AFE_DL_SRC2_CON0_H,
695 (get_play_reg_val(cmpnt, priv->dl_rate) << 12) |
698 regmap_update_bits(cmpnt->regmap, MT6351_AFE_PMIC_NEWIF_CFG2,
712 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
713 struct mt6351_priv *priv = snd_soc_component_get_drvdata(cmpnt);
729 hp_zcd_disable(cmpnt);
732 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON6,
736 regmap_read(cmpnt->regmap, MT6351_ZCD_CON2, &reg);
741 regmap_update_bits(cmpnt->regmap,
744 regmap_update_bits(cmpnt->regmap,
747 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON2,
750 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1,
753 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1,
756 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON0,
759 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1,
765 set_hp_gain_zero(cmpnt);
768 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1,
771 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1,
774 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON0,
779 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON6,
784 hp_zcd_enable(cmpnt);
787 hp_gain_ramp_set(cmpnt, HP_GAIN_RESTORE);
800 hp_zcd_disable(cmpnt);
803 hp_gain_ramp_set(cmpnt, HP_GAIN_SET_ZERO);
805 set_hp_gain_zero(cmpnt);
816 regmap_update_bits(cmpnt->regmap,
821 regmap_update_bits(cmpnt->regmap,
827 hp_gain_ramp_set(cmpnt, HP_GAIN_RESTORE);
840 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
841 struct mt6351_priv *priv = snd_soc_component_get_drvdata(cmpnt);
849 regmap_update_bits(cmpnt->regmap, MT6351_AFE_DCCLK_CFG0,
852 regmap_update_bits(cmpnt->regmap, MT6351_AFE_DCCLK_CFG0,
855 regmap_update_bits(cmpnt->regmap, MT6351_AFE_DCCLK_CFG0,
859 regmap_update_bits(cmpnt->regmap, MT6351_AFE_UL_SRC_CON0_H,
861 get_cap_reg_val(cmpnt, priv->ul_rate) << 1);
866 regmap_update_bits(cmpnt->regmap,
871 regmap_update_bits(cmpnt->regmap,
881 regmap_update_bits(cmpnt->regmap,
886 regmap_update_bits(cmpnt->regmap,
903 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
908 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON3,
913 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON3,
926 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
931 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON0,
935 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON0,
942 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON0,
956 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
961 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON1,
965 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON1,
972 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON1,
986 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
991 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9,
994 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9,
1000 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9,
1014 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
1019 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON10,
1022 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON10,
1028 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON10,
1042 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
1047 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9,
1050 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9,
1056 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9,
1408 static int mt6351_codec_init_reg(struct snd_soc_component *cmpnt)
1411 regmap_update_bits(cmpnt->regmap, MT6351_TOP_CLKSQ, 0x0001, 0x0);
1413 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON9,
1416 regmap_update_bits(cmpnt->regmap, MT6351_TOP_CKPDN_CON0_SET,
1419 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON0,
1422 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON3,
1425 regmap_update_bits(cmpnt->regmap, MT6351_AFE_PMIC_NEWIF_CFG2,
1430 static int mt6351_codec_probe(struct snd_soc_component *cmpnt)
1432 struct mt6351_priv *priv = snd_soc_component_get_drvdata(cmpnt);
1434 snd_soc_component_init_regmap(cmpnt, priv->regmap);
1436 mt6351_codec_init_reg(cmpnt);