Lines Matching refs:max98927
3 * max98927.c -- MAX98927 ALSA Soc Audio driver
22 #include "max98927.h"
143 struct max98927_priv *max98927 = snd_soc_component_get_drvdata(component);
153 max98927->provider = false;
157 max98927->provider = true;
165 regmap_update_bits(max98927->regmap, MAX98927_R0021_PCM_MASTER_MODE,
179 regmap_update_bits(max98927->regmap, MAX98927_R0020_PCM_MODE_CFG,
202 max98927->iface = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
206 regmap_update_bits(max98927->regmap, MAX98927_R0018_PCM_RX_EN_A,
210 regmap_update_bits(max98927->regmap,
215 regmap_update_bits(max98927->regmap, MAX98927_R003B_SPK_SRC_SEL,
218 regmap_update_bits(max98927->regmap, MAX98927_R0035_PDM_RX_CTRL,
222 regmap_update_bits(max98927->regmap, MAX98927_R0035_PDM_RX_CTRL,
225 regmap_update_bits(max98927->regmap, MAX98927_R003B_SPK_SRC_SEL,
228 regmap_update_bits(max98927->regmap, MAX98927_R0018_PCM_RX_EN_A,
257 static int max98927_set_clock(struct max98927_priv *max98927,
260 struct snd_soc_component *component = max98927->component;
262 int blr_clk_ratio = params_channels(params) * max98927->ch_size;
265 if (max98927->provider) {
269 if (rate_table[i] >= max98927->sysclk)
276 regmap_update_bits(max98927->regmap,
282 if (!max98927->tdm_mode) {
291 regmap_update_bits(max98927->regmap,
303 struct max98927_priv *max98927 = snd_soc_component_get_drvdata(component);
324 max98927->ch_size = snd_pcm_format_width(params_format(params));
326 regmap_update_bits(max98927->regmap, MAX98927_R0020_PCM_MODE_CFG,
367 regmap_update_bits(max98927->regmap, MAX98927_R0023_PCM_SR_SETUP1,
369 regmap_update_bits(max98927->regmap, MAX98927_R0024_PCM_SR_SETUP2,
374 if (max98927->interleave_mode &&
376 regmap_update_bits(max98927->regmap,
381 regmap_update_bits(max98927->regmap,
385 return max98927_set_clock(max98927, params);
395 struct max98927_priv *max98927 = snd_soc_component_get_drvdata(component);
399 max98927->tdm_mode = true;
409 regmap_update_bits(max98927->regmap, MAX98927_R0022_PCM_CLK_SETUP,
429 regmap_update_bits(max98927->regmap, MAX98927_R0020_PCM_MODE_CFG,
433 regmap_write(max98927->regmap, MAX98927_R0018_PCM_RX_EN_A,
435 regmap_write(max98927->regmap, MAX98927_R0019_PCM_RX_EN_B,
439 regmap_write(max98927->regmap, MAX98927_R001A_PCM_TX_EN_A,
441 regmap_write(max98927->regmap, MAX98927_R001B_PCM_TX_EN_B,
445 regmap_write(max98927->regmap, MAX98927_R001C_PCM_TX_HIZ_CTRL_A,
447 regmap_write(max98927->regmap, MAX98927_R001D_PCM_TX_HIZ_CTRL_B,
462 struct max98927_priv *max98927 = snd_soc_component_get_drvdata(component);
464 max98927->sysclk = freq;
479 struct max98927_priv *max98927 = snd_soc_component_get_drvdata(component);
483 max98927->tdm_mode = false;
486 regmap_update_bits(max98927->regmap, MAX98927_R003A_AMP_EN,
488 regmap_update_bits(max98927->regmap, MAX98927_R00FF_GLOBAL_SHDN,
492 regmap_update_bits(max98927->regmap, MAX98927_R00FF_GLOBAL_SHDN,
494 regmap_update_bits(max98927->regmap, MAX98927_R003A_AMP_EN,
631 .name = "max98927-aif1",
652 struct max98927_priv *max98927 = snd_soc_component_get_drvdata(component);
654 max98927->component = component;
657 regmap_write(max98927->regmap, MAX98927_R0100_SOFT_RESET,
661 regmap_write(max98927->regmap, MAX98927_R001C_PCM_TX_HIZ_CTRL_A, 0xFF);
662 regmap_write(max98927->regmap, MAX98927_R001D_PCM_TX_HIZ_CTRL_B, 0xFF);
663 regmap_write(max98927->regmap, MAX98927_R0025_PCM_TO_SPK_MONOMIX_A,
665 regmap_write(max98927->regmap, MAX98927_R0026_PCM_TO_SPK_MONOMIX_B,
668 regmap_write(max98927->regmap, MAX98927_R0036_AMP_VOL_CTRL, 0x38);
669 regmap_write(max98927->regmap, MAX98927_R003C_SPK_GAIN, 0x05);
671 regmap_write(max98927->regmap, MAX98927_R0037_AMP_DSP_CFG, 0x03);
673 regmap_write(max98927->regmap, MAX98927_R003F_MEAS_DSP_CFG, 0xF7);
675 regmap_write(max98927->regmap, MAX98927_R0040_BOOST_CTRL0, 0x1C);
676 regmap_write(max98927->regmap, MAX98927_R0042_BOOST_CTRL1, 0x3E);
678 regmap_write(max98927->regmap, MAX98927_R0043_MEAS_ADC_CFG, 0x04);
679 regmap_write(max98927->regmap, MAX98927_R0044_MEAS_ADC_BASE_MSB, 0x00);
680 regmap_write(max98927->regmap, MAX98927_R0045_MEAS_ADC_BASE_LSB, 0x24);
682 regmap_write(max98927->regmap, MAX98927_R007F_BROWNOUT_LVL4_AMP1_CTRL1,
685 regmap_write(max98927->regmap, MAX98927_R0082_ENV_TRACK_VOUT_HEADROOM,
687 regmap_write(max98927->regmap, MAX98927_R0086_ENV_TRACK_CTRL, 0x01);
688 regmap_write(max98927->regmap, MAX98927_R0087_ENV_TRACK_BOOST_VOUT_READ,
692 regmap_write(max98927->regmap, MAX98927_R001E_PCM_TX_CH_SRC_A,
693 (max98927->i_l_slot << MAX98927_PCM_TX_CH_SRC_A_I_SHIFT | max98927->v_l_slot) & 0xFF);
695 if (max98927->v_l_slot < 8) {
696 regmap_update_bits(max98927->regmap,
698 1 << max98927->v_l_slot, 0);
699 regmap_update_bits(max98927->regmap, MAX98927_R001A_PCM_TX_EN_A,
700 1 << max98927->v_l_slot,
701 1 << max98927->v_l_slot);
703 regmap_update_bits(max98927->regmap,
705 1 << (max98927->v_l_slot - 8), 0);
706 regmap_update_bits(max98927->regmap, MAX98927_R001B_PCM_TX_EN_B,
707 1 << (max98927->v_l_slot - 8),
708 1 << (max98927->v_l_slot - 8));
711 if (max98927->i_l_slot < 8) {
712 regmap_update_bits(max98927->regmap,
714 1 << max98927->i_l_slot, 0);
715 regmap_update_bits(max98927->regmap, MAX98927_R001A_PCM_TX_EN_A,
716 1 << max98927->i_l_slot,
717 1 << max98927->i_l_slot);
719 regmap_update_bits(max98927->regmap,
721 1 << (max98927->i_l_slot - 8), 0);
722 regmap_update_bits(max98927->regmap, MAX98927_R001B_PCM_TX_EN_B,
723 1 << (max98927->i_l_slot - 8),
724 1 << (max98927->i_l_slot - 8));
728 if (max98927->interleave_mode)
729 regmap_update_bits(max98927->regmap,
739 struct max98927_priv *max98927 = dev_get_drvdata(dev);
741 regcache_cache_only(max98927->regmap, true);
742 regcache_mark_dirty(max98927->regmap);
747 struct max98927_priv *max98927 = dev_get_drvdata(dev);
749 regmap_write(max98927->regmap, MAX98927_R0100_SOFT_RESET,
751 regcache_cache_only(max98927->regmap, false);
752 regcache_sync(max98927->regmap);
786 struct max98927_priv *max98927)
792 max98927->v_l_slot = value & 0xF;
794 max98927->v_l_slot = 0;
797 max98927->i_l_slot = value & 0xF;
799 max98927->i_l_slot = 1;
807 struct max98927_priv *max98927 = NULL;
809 max98927 = devm_kzalloc(&i2c->dev, sizeof(*max98927), GFP_KERNEL);
810 if (!max98927) {
814 i2c_set_clientdata(i2c, max98927);
818 max98927->interleave_mode = true;
823 max98927->interleave_mode = true;
827 max98927->regmap
829 if (IS_ERR(max98927->regmap)) {
830 ret = PTR_ERR(max98927->regmap);
836 max98927->reset_gpio = devm_gpiod_get_optional(&i2c->dev, "reset",
838 if (IS_ERR(max98927->reset_gpio)) {
839 ret = PTR_ERR(max98927->reset_gpio);
843 if (max98927->reset_gpio) {
844 gpiod_set_value_cansleep(max98927->reset_gpio, 0);
850 ret = regmap_read(max98927->regmap, MAX98927_R01FF_REV_ID, ®);
859 max98927_slot_config(i2c, max98927);
873 struct max98927_priv *max98927 = i2c_get_clientdata(i2c);
875 if (max98927->reset_gpio)
876 gpiod_set_value_cansleep(max98927->reset_gpio, 1);
880 { "max98927", 0},
888 { .compatible = "maxim,max98927", },
904 .name = "max98927",