Lines Matching defs:sysclk
260 u8 sysclk = 0;
369 sysclk = MAX9860_FREQ_12MHZ;
372 sysclk = MAX9860_FREQ_13MHZ;
375 sysclk = MAX9860_FREQ_19_2MHZ;
380 * sysclk at zero and fall through to the
386 if (sysclk && params_rate(params) == 16000)
387 sysclk |= MAX9860_16KHZ;
401 if (!sysclk) {
404 sysclk |= MAX9860_16KHZ;
410 sysclk |= max9860->psclk;
411 dev_dbg(component->dev, "SYSCLK %02x\n", sysclk);
413 MAX9860_SYSCLK, sysclk);