Lines Matching defs:component

251 static void m98095_eq_band(struct snd_soc_component *component, unsigned int dai,
269 snd_soc_component_write(component, eq_reg++, M98095_BYTE1(coefs[i]));
270 snd_soc_component_write(component, eq_reg++, M98095_BYTE0(coefs[i]));
277 static void m98095_biquad_band(struct snd_soc_component *component, unsigned int dai,
295 snd_soc_component_write(component, bq_reg++, M98095_BYTE1(coefs[i]));
296 snd_soc_component_write(component, bq_reg++, M98095_BYTE0(coefs[i]));
353 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
354 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
358 snd_soc_component_update_bits(component, M98095_05F_LVL_MIC1, M98095_MICPRE_MASK,
367 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
368 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
377 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
378 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
382 snd_soc_component_update_bits(component, M98095_060_LVL_MIC2, M98095_MICPRE_MASK,
391 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
392 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
598 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
599 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
604 snd_soc_component_update_bits(component, w->reg, M98095_MICPRE_MASK,
607 snd_soc_component_update_bits(component, w->reg, M98095_MICPRE_MASK,
612 snd_soc_component_update_bits(component, w->reg, M98095_MICPRE_MASK, 0);
628 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
629 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
640 snd_soc_component_update_bits(component, w->reg,
646 snd_soc_component_update_bits(component, w->reg,
676 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
680 snd_soc_component_update_bits(component, w->reg,
684 snd_soc_component_update_bits(component, w->reg,
942 struct snd_soc_component *component = dai->component;
943 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
955 snd_soc_component_update_bits(component, M98095_02A_DAI1_FORMAT,
959 snd_soc_component_update_bits(component, M98095_02A_DAI1_FORMAT,
969 snd_soc_component_update_bits(component, M98095_027_DAI1_CLKMODE,
974 if (snd_soc_component_read(component, M98095_02A_DAI1_FORMAT) & M98095_DAI_MAS) {
976 dev_err(component->dev, "Invalid system clock frequency\n");
982 snd_soc_component_write(component, M98095_028_DAI1_CLKCFG_HI,
984 snd_soc_component_write(component, M98095_029_DAI1_CLKCFG_LO,
990 snd_soc_component_update_bits(component, M98095_02E_DAI1_FILTERS,
993 snd_soc_component_update_bits(component, M98095_02E_DAI1_FILTERS,
1003 struct snd_soc_component *component = dai->component;
1004 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1016 snd_soc_component_update_bits(component, M98095_034_DAI2_FORMAT,
1020 snd_soc_component_update_bits(component, M98095_034_DAI2_FORMAT,
1030 snd_soc_component_update_bits(component, M98095_031_DAI2_CLKMODE,
1035 if (snd_soc_component_read(component, M98095_034_DAI2_FORMAT) & M98095_DAI_MAS) {
1037 dev_err(component->dev, "Invalid system clock frequency\n");
1043 snd_soc_component_write(component, M98095_032_DAI2_CLKCFG_HI,
1045 snd_soc_component_write(component, M98095_033_DAI2_CLKCFG_LO,
1051 snd_soc_component_update_bits(component, M98095_038_DAI2_FILTERS,
1054 snd_soc_component_update_bits(component, M98095_038_DAI2_FILTERS,
1064 struct snd_soc_component *component = dai->component;
1065 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1077 snd_soc_component_update_bits(component, M98095_03E_DAI3_FORMAT,
1081 snd_soc_component_update_bits(component, M98095_03E_DAI3_FORMAT,
1091 snd_soc_component_update_bits(component, M98095_03B_DAI3_CLKMODE,
1096 if (snd_soc_component_read(component, M98095_03E_DAI3_FORMAT) & M98095_DAI_MAS) {
1098 dev_err(component->dev, "Invalid system clock frequency\n");
1104 snd_soc_component_write(component, M98095_03C_DAI3_CLKCFG_HI,
1106 snd_soc_component_write(component, M98095_03D_DAI3_CLKCFG_LO,
1112 snd_soc_component_update_bits(component, M98095_042_DAI3_FILTERS,
1115 snd_soc_component_update_bits(component, M98095_042_DAI3_FILTERS,
1124 struct snd_soc_component *component = dai->component;
1125 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1142 snd_soc_component_write(component, M98095_026_SYS_CLK, 0x10);
1144 snd_soc_component_write(component, M98095_026_SYS_CLK, 0x20);
1146 snd_soc_component_write(component, M98095_026_SYS_CLK, 0x30);
1148 dev_err(component->dev, "Invalid master clock frequency\n");
1161 struct snd_soc_component *component = codec_dai->component;
1162 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1174 snd_soc_component_write(component, M98095_028_DAI1_CLKCFG_HI,
1176 snd_soc_component_write(component, M98095_029_DAI1_CLKCFG_LO,
1184 dev_err(component->dev, "Clock mode unsupported");
1214 snd_soc_component_update_bits(component, M98095_02A_DAI1_FORMAT,
1218 snd_soc_component_write(component, M98095_02B_DAI1_CLOCK, M98095_DAI_BSEL64);
1227 struct snd_soc_component *component = codec_dai->component;
1228 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1240 snd_soc_component_write(component, M98095_032_DAI2_CLKCFG_HI,
1242 snd_soc_component_write(component, M98095_033_DAI2_CLKCFG_LO,
1250 dev_err(component->dev, "Clock mode unsupported");
1280 snd_soc_component_update_bits(component, M98095_034_DAI2_FORMAT,
1284 snd_soc_component_write(component, M98095_035_DAI2_CLOCK,
1294 struct snd_soc_component *component = codec_dai->component;
1295 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1307 snd_soc_component_write(component, M98095_03C_DAI3_CLKCFG_HI,
1309 snd_soc_component_write(component, M98095_03D_DAI3_CLKCFG_LO,
1317 dev_err(component->dev, "Clock mode unsupported");
1347 snd_soc_component_update_bits(component, M98095_03E_DAI3_FORMAT,
1351 snd_soc_component_write(component, M98095_03F_DAI3_CLOCK,
1358 static int max98095_set_bias_level(struct snd_soc_component *component,
1361 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1379 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON) {
1389 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1393 dev_err(component->dev, "Failed to sync cache: %d\n", ret);
1398 snd_soc_component_update_bits(component, M98095_090_PWR_EN_IN,
1403 snd_soc_component_update_bits(component, M98095_090_PWR_EN_IN,
1488 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1489 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1522 dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n",
1531 regsave = snd_soc_component_read(component, M98095_088_CFG_LEVEL);
1532 snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, 0);
1535 snd_soc_component_update_bits(component, M98095_00F_HOST_CFG, M98095_SEG, M98095_SEG);
1536 m98095_eq_band(component, channel, 0, coef_set->band1);
1537 m98095_eq_band(component, channel, 1, coef_set->band2);
1538 m98095_eq_band(component, channel, 2, coef_set->band3);
1539 m98095_eq_band(component, channel, 3, coef_set->band4);
1540 m98095_eq_band(component, channel, 4, coef_set->band5);
1541 snd_soc_component_update_bits(component, M98095_00F_HOST_CFG, M98095_SEG, 0);
1545 snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, regsave);
1552 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1553 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1563 static void max98095_handle_eq_pdata(struct snd_soc_component *component)
1565 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1618 ret = snd_soc_add_component_controls(component, controls, ARRAY_SIZE(controls));
1620 dev_err(component->dev, "Failed to add EQ control: %d\n", ret);
1625 static int max98095_get_bq_channel(struct snd_soc_component *component,
1632 dev_err(component->dev, "Bad biquad channel name '%s'\n", name);
1639 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1640 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1642 int channel = max98095_get_bq_channel(component, kcontrol->id.name);
1673 dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n",
1682 regsave = snd_soc_component_read(component, M98095_088_CFG_LEVEL);
1683 snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, 0);
1686 snd_soc_component_update_bits(component, M98095_00F_HOST_CFG, M98095_SEG, M98095_SEG);
1687 m98095_biquad_band(component, channel, 0, coef_set->band1);
1688 m98095_biquad_band(component, channel, 1, coef_set->band2);
1689 snd_soc_component_update_bits(component, M98095_00F_HOST_CFG, M98095_SEG, 0);
1693 snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, regsave);
1700 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1701 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1702 int channel = max98095_get_bq_channel(component, kcontrol->id.name);
1714 static void max98095_handle_bq_pdata(struct snd_soc_component *component)
1716 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1770 ret = snd_soc_add_component_controls(component, controls, ARRAY_SIZE(controls));
1772 dev_err(component->dev, "Failed to add Biquad control: %d\n", ret);
1775 static void max98095_handle_pdata(struct snd_soc_component *component)
1777 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1782 dev_dbg(component->dev, "No platform data\n");
1793 snd_soc_component_write(component, M98095_087_CFG_MIC, regval);
1797 max98095_handle_eq_pdata(component);
1801 max98095_handle_bq_pdata(component);
1806 struct snd_soc_component *component = data;
1807 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1813 value = snd_soc_component_read(component, M98095_007_JACK_AUTO_STS);
1844 static int max98095_jack_detect_enable(struct snd_soc_component *component)
1846 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1857 ret = snd_soc_component_write(component, M98095_08E_JACK_DC_SLEW, slew);
1859 dev_err(component->dev, "Failed to cfg auto detect %d\n", ret);
1864 ret = snd_soc_component_write(component, M98095_089_JACK_DET_AUTO, detect_enable);
1866 dev_err(component->dev, "Failed to cfg auto detect %d\n", ret);
1873 static int max98095_jack_detect_disable(struct snd_soc_component *component)
1878 ret = snd_soc_component_write(component, M98095_089_JACK_DET_AUTO, 0x0);
1880 dev_err(component->dev, "Failed to cfg auto detect %d\n", ret);
1887 int max98095_jack_detect(struct snd_soc_component *component,
1890 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1891 struct i2c_client *client = to_i2c_client(component->dev);
1901 max98095_jack_detect_enable(component);
1904 ret = snd_soc_component_update_bits(component, M98095_013_JACK_INT_EN,
1907 dev_err(component->dev, "Failed to cfg jack irqs %d\n", ret);
1911 max98095_report_jack(client->irq, component);
1917 static int max98095_suspend(struct snd_soc_component *component)
1919 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1922 max98095_jack_detect_disable(component);
1924 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
1929 static int max98095_resume(struct snd_soc_component *component)
1931 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1932 struct i2c_client *client = to_i2c_client(component->dev);
1934 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
1937 max98095_jack_detect_enable(component);
1938 max98095_report_jack(client->irq, component);
1948 static int max98095_reset(struct snd_soc_component *component)
1954 ret = snd_soc_component_write(component, M98095_00F_HOST_CFG, 0);
1956 dev_err(component->dev, "Failed to reset DSP: %d\n", ret);
1960 ret = snd_soc_component_write(component, M98095_097_PWR_SYS, 0);
1962 dev_err(component->dev, "Failed to reset component: %d\n", ret);
1969 ret = snd_soc_component_write(component, i, snd_soc_component_read(component, i));
1971 dev_err(component->dev, "Failed to reset: %d\n", ret);
1979 static int max98095_probe(struct snd_soc_component *component)
1981 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1986 max98095->mclk = devm_clk_get(component->dev, "mclk");
1991 max98095_reset(component);
1993 client = to_i2c_client(component->dev);
2028 IRQF_ONESHOT, "max98095", component);
2030 dev_err(component->dev, "Failed to request IRQ: %d\n", ret);
2035 ret = snd_soc_component_read(component, M98095_0FF_REV_ID);
2037 dev_err(component->dev, "Failure reading hardware revision: %d\n",
2041 dev_info(component->dev, "Hardware revision: %c\n", ret - 0x40 + 'A');
2043 snd_soc_component_write(component, M98095_097_PWR_SYS, M98095_PWRSV);
2045 snd_soc_component_write(component, M98095_048_MIX_DAC_LR,
2048 snd_soc_component_write(component, M98095_049_MIX_DAC_M,
2051 snd_soc_component_write(component, M98095_092_PWR_EN_OUT, M98095_SPK_SPREADSPECTRUM);
2052 snd_soc_component_write(component, M98095_045_CFG_DSP, M98095_DSPNORMAL);
2053 snd_soc_component_write(component, M98095_04E_CFG_HP, M98095_HPNORMAL);
2055 snd_soc_component_write(component, M98095_02C_DAI1_IOCFG,
2058 snd_soc_component_write(component, M98095_036_DAI2_IOCFG,
2061 snd_soc_component_write(component, M98095_040_DAI3_IOCFG,
2064 max98095_handle_pdata(component);
2067 snd_soc_component_update_bits(component, M98095_097_PWR_SYS, M98095_SHDNRUN,
2074 free_irq(client->irq, component);
2079 static void max98095_remove(struct snd_soc_component *component)
2081 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
2082 struct i2c_client *client = to_i2c_client(component->dev);
2085 max98095_jack_detect_disable(component);
2088 free_irq(client->irq, component);