Lines Matching defs:dai_clk_mode
1160 u8 dai_clk_mode = DA7213_DAI_BCLKS_PER_WCLK_64;
1184 dai_clk_mode = DA7213_DAI_BCLKS_PER_WCLK_32; /* 32bit for 1ch and 2ch */
1246 DA7213_DAI_BCLKS_PER_WCLK_MASK, dai_clk_mode);
1259 u8 dai_clk_mode = 0, dai_ctrl = 0;
1283 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
1286 dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
1289 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV |
1301 dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
1304 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV |
1310 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
1348 dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_64;
1353 dai_clk_mode);