Lines Matching defs:reg2
691 union cx2072x_reg_i2spcm_ctrl_reg2 reg2;
715 reg2.r.tx_master = 1;
720 reg2.r.tx_master = 0;
799 reg2.r.tx_endian_sel = !is_big_endian;
800 reg2.r.tx_dstart_dly = has_one_bit_delay;
802 reg2.r.tx_dstart_dly = 0;
810 reg2.r.tx_slot_1 = 0;
811 reg2.r.tx_slot_2 = i2s_right_slot;
834 if (reg2.r.tx_master) {
849 reg2.ulval);