Lines Matching refs:cs42l43
14 #include <linux/mfd/cs42l43.h>
15 #include <linux/mfd/cs42l43-regs.h>
28 #include "cs42l43.h"
222 struct cs42l43 *cs42l43 = priv->core;
223 int provider = !!regmap_test_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG2,
265 struct cs42l43 *cs42l43 = priv->core;
275 regmap_update_bits(cs42l43->regmap, CS42L43_SAMPLE_RATE1,
286 struct cs42l43 *cs42l43 = priv->core;
287 int dsp_mode = !!regmap_test_bits(cs42l43->regmap, CS42L43_ASP_CTRL,
289 int provider = !!regmap_test_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG2,
326 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG1,
330 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_FSYNC_CTRL1,
334 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_FSYNC_CTRL4,
358 regmap_update_bits(cs42l43->regmap, reg,
375 struct cs42l43 *cs42l43 = priv->core;
376 int provider = regmap_test_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG2,
443 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_CTRL,
446 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_DATA_CTRL,
450 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG2,
454 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_FSYNC_CTRL3,
534 .name = "cs42l43-asp",
553 .name = "cs42l43-dp1",
565 .name = "cs42l43-dp2",
577 .name = "cs42l43-dp3",
589 .name = "cs42l43-dp4",
601 .name = "cs42l43-dp5",
613 .name = "cs42l43-dp6",
625 .name = "cs42l43-dp7",
911 struct cs42l43 *cs42l43 = priv->core;
915 regmap_update_bits(cs42l43->regmap, CS42L43_INTP_VOLUME_CTRL1,
917 regmap_update_bits(cs42l43->regmap, CS42L43_INTP_VOLUME_CTRL1,
925 struct cs42l43 *cs42l43 = priv->core;
940 ret = regcache_drop_region(cs42l43->regmap, CS42L43_SHUTTER_CONTROL,
947 ret = regmap_read(cs42l43->regmap, CS42L43_SHUTTER_CONTROL, &val);
1150 struct cs42l43 *cs42l43 = priv->core;
1156 regmap_update_bits(cs42l43->regmap, CS42L43_MUTE_EQ_IN0,
1160 regmap_update_bits(cs42l43->regmap, CS42L43_COEFF_RD_WR0,
1164 regmap_write(cs42l43->regmap, CS42L43_COEFF_DATA_IN0,
1167 regmap_update_bits(cs42l43->regmap, CS42L43_COEFF_RD_WR0,
1172 ret = regmap_read_poll_timeout(cs42l43->regmap, CS42L43_INIT_DONE0,
1178 regmap_update_bits(cs42l43->regmap, CS42L43_MUTE_EQ_IN0,
1203 struct cs42l43 *cs42l43 = priv->core;
1205 lockdep_assert_held(&cs42l43->pll_lock);
1210 if (regmap_test_bits(cs42l43->regmap, CS42L43_CTRL_REG, CS42L43_PLL_EN_MASK)) {
1237 struct cs42l43 *cs42l43 = priv->core;
1243 lockdep_assert_held(&cs42l43->pll_lock);
1247 freq = cs42l43->sdw_freq;
1248 else if (!cs42l43->sdw_freq)
1249 cs42l43->sdw_freq = freq;
1275 regmap_update_bits(cs42l43->regmap, CS42L43_PLL_CONTROL,
1279 regmap_write(cs42l43->regmap, CS42L43_FDIV_FRAC, config->div);
1280 regmap_update_bits(cs42l43->regmap, CS42L43_CTRL_REG,
1284 regmap_update_bits(cs42l43->regmap, CS42L43_CAL_RATIO,
1286 regmap_update_bits(cs42l43->regmap, CS42L43_PLL_CONTROL,
1291 regmap_update_bits(cs42l43->regmap, CS42L43_CTRL_REG,
1297 regmap_update_bits(cs42l43->regmap, CS42L43_CTRL_REG,
1299 regmap_update_bits(cs42l43->regmap, CS42L43_PLL_CONTROL,
1307 cs42l43->sdw_pll_active = true;
1316 regmap_multi_reg_write(cs42l43->regmap, enable_seq, ARRAY_SIZE(enable_seq));
1327 struct cs42l43 *cs42l43 = priv->core;
1331 lockdep_assert_held(&cs42l43->pll_lock);
1333 regmap_multi_reg_write(cs42l43->regmap, disable_seq, ARRAY_SIZE(disable_seq));
1334 regmap_update_bits(cs42l43->regmap, CS42L43_CTRL_REG, CS42L43_PLL_EN_MASK, 0);
1335 regmap_update_bits(cs42l43->regmap, CS42L43_PLL_CONTROL,
1338 cs42l43->sdw_pll_active = false;
1348 struct cs42l43 *cs42l43 = priv->core;
1351 mutex_lock(&cs42l43->pll_lock);
1376 mutex_unlock(&cs42l43->pll_lock);
1436 struct cs42l43 *cs42l43 = priv->core;
1456 regmap_update_bits(cs42l43->regmap, CS42L43_BLOCK_EN8,
1482 struct cs42l43 *cs42l43 = priv->core;
1521 ret = regmap_read(cs42l43->regmap, reg, val);
1529 regmap_update_bits(cs42l43->regmap, reg, mute | ramp, mute);
1532 regmap_update_bits(cs42l43->regmap, reg, mute | ramp, *val);
1546 struct cs42l43 *cs42l43 = priv->core;
1564 regmap_update_bits(cs42l43->regmap, CS42L43_BLOCK_EN3,
2000 struct cs42l43 *cs42l43 = priv->core;
2003 mutex_lock(&cs42l43->pll_lock);
2005 mutex_unlock(&cs42l43->pll_lock);
2013 struct cs42l43 *cs42l43 = priv->core;
2015 snd_soc_component_init_regmap(component, cs42l43->regmap);
2027 .name = "cs42l43-codec",
2137 struct cs42l43 *cs42l43 = dev_get_drvdata(pdev->dev.parent);
2143 dom = irq_find_matching_fwnode(dev_fwnode(cs42l43->dev), DOMAIN_BUS_ANY);
2152 priv->core = cs42l43;
2191 ret = regmap_read(cs42l43->regmap, CS42L43_SHUTTER_CONTROL, &val);
2211 priv->mclk = clk_get_optional(cs42l43->dev, "mclk");
2263 { "cs42l43-codec", },
2270 .name = "cs42l43-codec",