Lines Matching refs:cs42l42
3 * cs42l42.c -- CS42L42 ALSA SoC audio driver
35 #include <dt-bindings/sound/cs42l42.h>
37 #include "cs42l42.h"
483 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
487 cs42l42->hp_adc_up_pending = true;
491 if (cs42l42->hp_adc_up_pending) {
494 cs42l42->hp_adc_up_pending = false;
568 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
571 mutex_lock(&cs42l42->irq_lock);
572 cs42l42->jack = jk;
575 switch (cs42l42->hs_type) {
587 mutex_unlock(&cs42l42->irq_lock);
670 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
674 if (cs42l42->stream_use) {
675 if (pll_ratio_table[cs42l42->pll_config].sclk == clk)
687 cs42l42->pll_config = i;
758 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
762 if (cs42l42->stream_use)
895 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
902 if (cs42l42->sclk)
916 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
925 if (cs42l42->bclk_ratio) {
927 bclk = cs42l42->bclk_ratio * params_rate(params);
928 } else if (cs42l42->sclk) {
930 bclk = cs42l42->sclk;
998 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
1002 cs42l42->sclk = 0;
1008 cs42l42->sclk = freq;
1022 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
1024 cs42l42->bclk_ratio = bclk_ratio;
1032 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
1045 cs42l42->stream_use &= ~(1 << stream);
1046 if (!cs42l42->stream_use) {
1052 regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_osc_seq,
1066 if (!cs42l42->stream_use) {
1075 if (pll_ratio_table[cs42l42->pll_config].mclk_src_sel) {
1079 if (pll_ratio_table[cs42l42->pll_config].n > 1) {
1082 regval = pll_ratio_table[cs42l42->pll_config].pll_divout;
1089 ret = regmap_read_poll_timeout(cs42l42->regmap,
1106 regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_sclk_seq,
1109 cs42l42->stream_use |= 1 << stream;
1138 .name = "cs42l42",
1159 static void cs42l42_manual_hs_type_detect(struct cs42l42_private *cs42l42)
1167 regmap_update_bits(cs42l42->regmap,
1179 regmap_update_bits(cs42l42->regmap,
1187 regmap_write(cs42l42->regmap, CS42L42_HS_SWITCH_CTL, CS42L42_HSDET_SW_COMP1);
1191 regmap_read(cs42l42->regmap, CS42L42_HS_DET_STATUS, &hs_det_status);
1199 regmap_write(cs42l42->regmap, CS42L42_HS_SWITCH_CTL, CS42L42_HSDET_SW_COMP2);
1203 regmap_read(cs42l42->regmap, CS42L42_HS_DET_STATUS, &hs_det_status);
1213 cs42l42->hs_type = CS42L42_PLUG_CTIA;
1217 cs42l42->hs_type = CS42L42_PLUG_OMTP;
1224 cs42l42->hs_type = CS42L42_PLUG_CTIA;
1228 cs42l42->hs_type = CS42L42_PLUG_OMTP;
1233 cs42l42->hs_type = CS42L42_PLUG_HEADPHONE;
1240 regmap_write(cs42l42->regmap, CS42L42_HS_SWITCH_CTL, hs_det_sw);
1243 regmap_update_bits(cs42l42->regmap,
1255 regmap_update_bits(cs42l42->regmap,
1263 static void cs42l42_process_hs_type_detect(struct cs42l42_private *cs42l42)
1269 regmap_read(cs42l42->regmap, CS42L42_HS_DET_STATUS, &hs_det_status);
1272 regmap_update_bits(cs42l42->regmap,
1280 cs42l42->hs_type = (hs_det_status & CS42L42_HSDET_TYPE_MASK) >>
1284 regmap_update_bits(cs42l42->regmap,
1299 if (cs42l42->hs_type == CS42L42_PLUG_INVALID ||
1300 cs42l42->hs_type == CS42L42_PLUG_HEADPHONE) {
1301 dev_dbg(cs42l42->dev, "Running Manual Detection Fallback\n");
1302 cs42l42_manual_hs_type_detect(cs42l42);
1306 if ((cs42l42->hs_type == CS42L42_PLUG_CTIA) ||
1307 (cs42l42->hs_type == CS42L42_PLUG_OMTP)) {
1309 regmap_update_bits(cs42l42->regmap,
1321 regmap_update_bits(cs42l42->regmap,
1328 (cs42l42->bias_thresholds[0] <<
1332 regmap_update_bits(cs42l42->regmap,
1338 (cs42l42->hs_bias_sense_en << CS42L42_HSBIAS_SENSE_EN_SHIFT) |
1344 regmap_update_bits(cs42l42->regmap,
1351 msleep(cs42l42->btn_det_init_dbnce);
1354 regmap_read(cs42l42->regmap, CS42L42_DET_INT_STATUS2,
1358 regmap_update_bits(cs42l42->regmap,
1372 regmap_update_bits(cs42l42->regmap,
1380 regmap_update_bits(cs42l42->regmap,
1394 regmap_update_bits(cs42l42->regmap,
1402 static void cs42l42_init_hs_type_detect(struct cs42l42_private *cs42l42)
1405 regmap_update_bits(cs42l42->regmap,
1413 regmap_update_bits(cs42l42->regmap,
1421 regmap_update_bits(cs42l42->regmap,
1433 regmap_update_bits(cs42l42->regmap,
1444 regmap_update_bits(cs42l42->regmap,
1458 regmap_update_bits(cs42l42->regmap,
1466 msleep(cs42l42->hs_bias_ramp_time);
1469 regmap_update_bits(cs42l42->regmap,
1477 regmap_update_bits(cs42l42->regmap,
1489 static void cs42l42_cancel_hs_type_detect(struct cs42l42_private *cs42l42)
1492 regmap_update_bits(cs42l42->regmap,
1506 regmap_update_bits(cs42l42->regmap,
1514 regmap_update_bits(cs42l42->regmap,
1526 regmap_update_bits(cs42l42->regmap,
1538 static int cs42l42_handle_button_press(struct cs42l42_private *cs42l42)
1544 regmap_update_bits(cs42l42->regmap,
1557 usleep_range(cs42l42->btn_det_event_dbnce * 1000,
1558 cs42l42->btn_det_event_dbnce * 2000);
1564 regmap_update_bits(cs42l42->regmap,
1571 (cs42l42->bias_thresholds[bias_level] <<
1574 regmap_read(cs42l42->regmap, CS42L42_DET_STATUS2,
1582 dev_dbg(cs42l42->dev, "Function C button press\n");
1586 dev_dbg(cs42l42->dev, "Function B button press\n");
1590 dev_dbg(cs42l42->dev, "Function D button press\n");
1594 dev_dbg(cs42l42->dev, "Function A button press\n");
1602 regmap_update_bits(cs42l42->regmap,
1609 (cs42l42->bias_thresholds[0] << CS42L42_HS_DET_LEVEL_SHIFT));
1612 regmap_read(cs42l42->regmap, CS42L42_DET_INT_STATUS2,
1616 regmap_update_bits(cs42l42->regmap,
1667 struct cs42l42_private *cs42l42 = (struct cs42l42_private *)data;
1674 pm_runtime_get_sync(cs42l42->dev);
1675 mutex_lock(&cs42l42->irq_lock);
1676 if (cs42l42->suspended || !cs42l42->init_done) {
1677 mutex_unlock(&cs42l42->irq_lock);
1678 pm_runtime_put_autosuspend(cs42l42->dev);
1684 regmap_read(cs42l42->regmap, irq_params_table[i].status_addr,
1686 regmap_read(cs42l42->regmap, irq_params_table[i].mask_addr,
1710 cs42l42_process_hs_type_detect(cs42l42);
1711 switch (cs42l42->hs_type) {
1714 snd_soc_jack_report(cs42l42->jack, SND_JACK_HEADSET,
1720 snd_soc_jack_report(cs42l42->jack, SND_JACK_HEADPHONE,
1728 dev_dbg(cs42l42->dev, "Auto detect done (%d)\n", cs42l42->hs_type);
1736 if (cs42l42->plug_state != CS42L42_TS_PLUG) {
1737 cs42l42->plug_state = CS42L42_TS_PLUG;
1738 cs42l42_init_hs_type_detect(cs42l42);
1743 if (cs42l42->plug_state != CS42L42_TS_UNPLUG) {
1744 cs42l42->plug_state = CS42L42_TS_UNPLUG;
1745 cs42l42_cancel_hs_type_detect(cs42l42);
1747 snd_soc_jack_report(cs42l42->jack, 0,
1752 dev_dbg(cs42l42->dev, "Unplug event\n");
1757 cs42l42->plug_state = CS42L42_TS_TRANS;
1762 if (cs42l42->plug_state == CS42L42_TS_PLUG && ((~masks[7]) & irq_params_table[7].mask)) {
1767 dev_dbg(cs42l42->dev, "Button released\n");
1768 snd_soc_jack_report(cs42l42->jack, 0,
1772 snd_soc_jack_report(cs42l42->jack,
1773 cs42l42_handle_button_press(cs42l42),
1780 mutex_unlock(&cs42l42->irq_lock);
1781 pm_runtime_mark_last_busy(cs42l42->dev);
1782 pm_runtime_put_autosuspend(cs42l42->dev);
1788 static void cs42l42_set_interrupt_masks(struct cs42l42_private *cs42l42)
1790 regmap_update_bits(cs42l42->regmap, CS42L42_ADC_OVFL_INT_MASK,
1794 regmap_update_bits(cs42l42->regmap, CS42L42_MIXER_INT_MASK,
1804 regmap_update_bits(cs42l42->regmap, CS42L42_SRC_INT_MASK,
1814 regmap_update_bits(cs42l42->regmap, CS42L42_ASP_RX_INT_MASK,
1826 regmap_update_bits(cs42l42->regmap, CS42L42_ASP_TX_INT_MASK,
1836 regmap_update_bits(cs42l42->regmap, CS42L42_CODEC_INT_MASK,
1842 regmap_update_bits(cs42l42->regmap, CS42L42_SRCPL_INT_MASK,
1852 regmap_update_bits(cs42l42->regmap, CS42L42_DET_INT1_MASK,
1860 regmap_update_bits(cs42l42->regmap, CS42L42_DET_INT2_MASK,
1872 regmap_update_bits(cs42l42->regmap, CS42L42_VPMON_INT_MASK,
1876 regmap_update_bits(cs42l42->regmap, CS42L42_PLL_LOCK_INT_MASK,
1880 regmap_update_bits(cs42l42->regmap, CS42L42_TSRS_PLUG_INT_MASK,
1891 static void cs42l42_setup_hs_type_detect(struct cs42l42_private *cs42l42)
1895 cs42l42->hs_type = CS42L42_PLUG_INVALID;
1901 regmap_update_bits(cs42l42->regmap, CS42L42_MISC_DET_CTL,
1905 regmap_update_bits(cs42l42->regmap, CS42L42_MIC_DET_CTL1,
1911 (cs42l42->bias_thresholds[0] <<
1915 regmap_update_bits(cs42l42->regmap,
1921 regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
1924 regmap_update_bits(cs42l42->regmap, CS42L42_TIPSENSE_CTL,
1929 (!cs42l42->ts_inv << CS42L42_TIP_SENSE_INV_SHIFT) |
1933 regmap_read(cs42l42->regmap,
1936 cs42l42->plug_state = (((char) reg) &
1949 struct cs42l42_private *cs42l42)
1961 cs42l42->ts_inv = val;
1967 cs42l42->ts_inv = CS42L42_TS_INV_DIS;
1970 cs42l42->ts_inv = CS42L42_TS_INV_DIS;
1984 cs42l42->ts_dbnc_rise = val;
1990 cs42l42->ts_dbnc_rise = CS42L42_TS_DBNCE_1000;
1993 cs42l42->ts_dbnc_rise = CS42L42_TS_DBNCE_1000;
1996 regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
1998 (cs42l42->ts_dbnc_rise <<
2012 cs42l42->ts_dbnc_fall = val;
2018 cs42l42->ts_dbnc_fall = CS42L42_TS_DBNCE_0;
2021 cs42l42->ts_dbnc_fall = CS42L42_TS_DBNCE_0;
2024 regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
2026 (cs42l42->ts_dbnc_fall <<
2032 cs42l42->btn_det_init_dbnce = val;
2037 cs42l42->btn_det_init_dbnce =
2041 cs42l42->btn_det_init_dbnce =
2048 cs42l42->btn_det_event_dbnce = val;
2052 cs42l42->btn_det_event_dbnce =
2056 cs42l42->btn_det_event_dbnce =
2065 cs42l42->bias_thresholds[i] = thresholds[i];
2070 cs42l42->bias_thresholds[i] = threshold_defaults[i];
2075 cs42l42->bias_thresholds[i] = threshold_defaults[i];
2082 cs42l42->hs_bias_ramp_rate = val;
2083 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME0;
2086 cs42l42->hs_bias_ramp_rate = val;
2087 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME1;
2090 cs42l42->hs_bias_ramp_rate = val;
2091 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME2;
2094 cs42l42->hs_bias_ramp_rate = val;
2095 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME3;
2101 cs42l42->hs_bias_ramp_rate = CS42L42_HSBIAS_RAMP_SLOW;
2102 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME2;
2105 cs42l42->hs_bias_ramp_rate = CS42L42_HSBIAS_RAMP_SLOW;
2106 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME2;
2109 regmap_update_bits(cs42l42->regmap, CS42L42_HS_BIAS_CTL,
2111 (cs42l42->hs_bias_ramp_rate <<
2115 cs42l42->hs_bias_sense_en = 0;
2117 cs42l42->hs_bias_sense_en = 1;
2157 struct cs42l42_private *cs42l42 = dev_get_drvdata(dev);
2162 if (!cs42l42->init_done)
2170 mutex_lock(&cs42l42->irq_lock);
2171 cs42l42->suspended = true;
2175 regmap_read(cs42l42->regmap, cs42l42_shutdown_seq[i].reg, ®);
2180 regmap_multi_reg_write(cs42l42->regmap,
2185 mutex_unlock(&cs42l42->irq_lock);
2189 ret = regmap_read_poll_timeout(cs42l42->regmap,
2198 regmap_update_bits(cs42l42->regmap, CS42L42_PWR_CTL2,
2202 regcache_cache_only(cs42l42->regmap, true);
2203 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0);
2204 regulator_bulk_disable(ARRAY_SIZE(cs42l42->supplies), cs42l42->supplies);
2208 regmap_write(cs42l42->regmap, cs42l42_shutdown_seq[i].reg, save_regs[i]);
2211 regcache_drop_region(cs42l42->regmap, CS42L42_PAGE_REGISTER, CS42L42_PAGE_REGISTER);
2222 struct cs42l42_private *cs42l42 = dev_get_drvdata(dev);
2225 if (!cs42l42->init_done)
2233 if (cs42l42->plug_state != CS42L42_TS_UNPLUG)
2234 cs42l42->plug_state = CS42L42_TS_TRANS;
2236 ret = regulator_bulk_enable(ARRAY_SIZE(cs42l42->supplies), cs42l42->supplies);
2242 gpiod_set_value_cansleep(cs42l42->reset_gpio, 1);
2253 struct cs42l42_private *cs42l42 = dev_get_drvdata(dev);
2255 regcache_cache_only(cs42l42->regmap, false);
2256 regcache_mark_dirty(cs42l42->regmap);
2258 mutex_lock(&cs42l42->irq_lock);
2260 regcache_sync_region(cs42l42->regmap, CS42L42_MIC_DET_CTL1, CS42L42_MIC_DET_CTL1);
2261 regcache_sync(cs42l42->regmap);
2263 cs42l42->suspended = false;
2264 mutex_unlock(&cs42l42->irq_lock);
2283 int cs42l42_common_probe(struct cs42l42_private *cs42l42,
2289 dev_set_drvdata(cs42l42->dev, cs42l42);
2290 mutex_init(&cs42l42->irq_lock);
2292 BUILD_BUG_ON(ARRAY_SIZE(cs42l42_supply_names) != ARRAY_SIZE(cs42l42->supplies));
2293 for (i = 0; i < ARRAY_SIZE(cs42l42->supplies); i++)
2294 cs42l42->supplies[i].supply = cs42l42_supply_names[i];
2296 ret = devm_regulator_bulk_get(cs42l42->dev,
2297 ARRAY_SIZE(cs42l42->supplies),
2298 cs42l42->supplies);
2300 dev_err(cs42l42->dev,
2305 ret = regulator_bulk_enable(ARRAY_SIZE(cs42l42->supplies),
2306 cs42l42->supplies);
2308 dev_err(cs42l42->dev,
2314 cs42l42->reset_gpio = devm_gpiod_get_optional(cs42l42->dev,
2316 if (IS_ERR(cs42l42->reset_gpio)) {
2317 ret = PTR_ERR(cs42l42->reset_gpio);
2321 if (cs42l42->reset_gpio) {
2322 dev_dbg(cs42l42->dev, "Found reset GPIO\n");
2328 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0);
2339 if (cs42l42->sdw_peripheral)
2340 cs42l42->sdw_waiting_first_unattach = true;
2342 gpiod_set_value_cansleep(cs42l42->reset_gpio, 1);
2347 if (cs42l42->irq) {
2348 ret = request_threaded_irq(cs42l42->irq,
2351 "cs42l42", cs42l42);
2353 dev_err_probe(cs42l42->dev, ret,
2360 ret = devm_snd_soc_register_component(cs42l42->dev, component_drv, dai, 1);
2367 if (cs42l42->irq)
2368 free_irq(cs42l42->irq, cs42l42);
2371 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0);
2373 regulator_bulk_disable(ARRAY_SIZE(cs42l42->supplies), cs42l42->supplies);
2379 int cs42l42_init(struct cs42l42_private *cs42l42)
2385 devid = cirrus_read_device_id(cs42l42->regmap, CS42L42_DEVID_AB);
2388 dev_err(cs42l42->dev, "Failed to read device ID: %d\n", ret);
2392 if (devid != cs42l42->devid) {
2394 dev_err(cs42l42->dev,
2396 cs42l42->devid & 0xff, devid, cs42l42->devid);
2400 ret = regmap_read(cs42l42->regmap, CS42L42_REVID, ®);
2402 dev_err(cs42l42->dev, "Get Revision ID failed\n");
2406 dev_info(cs42l42->dev,
2408 cs42l42->devid & 0xff, reg & 0xFF);
2411 regmap_update_bits(cs42l42->regmap, CS42L42_PWR_CTL1,
2427 ret = cs42l42_handle_device_data(cs42l42->dev, cs42l42);
2435 if (cs42l42->sdw_peripheral) {
2436 regmap_update_bits(cs42l42->regmap, CS42L42_PWR_CTL2,
2444 cs42l42_setup_hs_type_detect(cs42l42);
2450 cs42l42->init_done = true;
2453 cs42l42_set_interrupt_masks(cs42l42);
2458 regmap_write(cs42l42->regmap, CS42L42_CODEC_INT_MASK, 0xff);
2459 regmap_write(cs42l42->regmap, CS42L42_TSRS_PLUG_INT_MASK, 0xff);
2460 regmap_write(cs42l42->regmap, CS42L42_PWR_CTL1, 0xff);
2463 if (cs42l42->irq)
2464 free_irq(cs42l42->irq, cs42l42);
2466 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0);
2467 regulator_bulk_disable(ARRAY_SIZE(cs42l42->supplies),
2468 cs42l42->supplies);
2473 void cs42l42_common_remove(struct cs42l42_private *cs42l42)
2475 if (cs42l42->irq)
2476 free_irq(cs42l42->irq, cs42l42);
2482 if (cs42l42->init_done) {
2483 regmap_write(cs42l42->regmap, CS42L42_CODEC_INT_MASK, 0xff);
2484 regmap_write(cs42l42->regmap, CS42L42_TSRS_PLUG_INT_MASK, 0xff);
2485 regmap_write(cs42l42->regmap, CS42L42_PWR_CTL1, 0xff);
2488 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0);
2489 regulator_bulk_disable(ARRAY_SIZE(cs42l42->supplies), cs42l42->supplies);