Lines Matching defs:cs35l56_base
21 int cs35l56_set_patch(struct cs35l56_base *cs35l56_base)
23 return regmap_register_patch(cs35l56_base->regmap, cs35l56_patch,
197 int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command)
202 regmap_write(cs35l56_base->regmap, CS35L56_DSP_VIRTUAL1_MBOX_1, command);
203 ret = regmap_read_poll_timeout(cs35l56_base->regmap, CS35L56_DSP_VIRTUAL1_MBOX_1,
207 dev_warn(cs35l56_base->dev, "MBOX command %#x failed: %d\n", command, ret);
215 int cs35l56_firmware_shutdown(struct cs35l56_base *cs35l56_base)
221 ret = cs35l56_mbox_send(cs35l56_base, CS35L56_MBOX_CMD_SHUTDOWN);
225 if (cs35l56_base->rev < CS35L56_REVID_B0)
230 ret = regmap_read_poll_timeout(cs35l56_base->regmap, reg,
235 dev_err(cs35l56_base->dev, "Failed to poll PM_CUR_STATE to 1 is %d (ret %d)\n",
241 int cs35l56_wait_for_firmware_boot(struct cs35l56_base *cs35l56_base)
247 if (cs35l56_base->rev < CS35L56_REVID_B0)
261 cs35l56_base->regmap, reg, &val);
264 dev_err(cs35l56_base->dev, "Firmware boot timed out(%d): HALO_STATE=%#x\n",
292 void cs35l56_system_reset(struct cs35l56_base *cs35l56_base, bool is_soundwire)
298 regcache_cache_only(cs35l56_base->regmap, true);
299 regmap_multi_reg_write_bypassed(cs35l56_base->regmap,
308 regcache_cache_only(cs35l56_base->regmap, false);
312 int cs35l56_irq_request(struct cs35l56_base *cs35l56_base, int irq)
319 ret = devm_request_threaded_irq(cs35l56_base->dev, irq, NULL, cs35l56_irq,
321 "cs35l56", cs35l56_base);
323 cs35l56_base->irq = irq;
325 dev_err(cs35l56_base->dev, "Failed to get IRQ: %d\n", ret);
333 struct cs35l56_base *cs35l56_base = data;
341 if (!cs35l56_base->init_done)
344 mutex_lock(&cs35l56_base->irq_lock);
346 rv = pm_runtime_resume_and_get(cs35l56_base->dev);
348 dev_err(cs35l56_base->dev, "irq: failed to get pm_runtime: %d\n", rv);
352 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_STATUS, &val);
354 dev_dbg(cs35l56_base->dev, "Spurious IRQ: no pending interrupt\n");
359 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_EINT_1, &status1);
360 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_MASK_1, &mask1);
362 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_EINT_1, status1);
364 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_EINT_8, &status8);
365 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_MASK_8, &mask8);
367 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_EINT_8, status8);
369 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_EINT_20, &status20);
370 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_MASK_20, &mask20);
373 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_MASK_20, 0xffffffff);
375 dev_dbg(cs35l56_base->dev, "%s: %#x %#x\n", __func__, status1, status8);
382 dev_crit(cs35l56_base->dev, "Amp short error\n");
385 dev_crit(cs35l56_base->dev, "Overtemp error\n");
390 pm_runtime_put(cs35l56_base->dev);
392 mutex_unlock(&cs35l56_base->irq_lock);
398 int cs35l56_is_fw_reload_needed(struct cs35l56_base *cs35l56_base)
404 if (!cs35l56_base->fw_patched)
411 if (cs35l56_base->reset_gpio)
419 if (cs35l56_base->secured)
422 ret = pm_runtime_resume_and_get(cs35l56_base->dev);
424 dev_err(cs35l56_base->dev, "Failed to runtime_get: %d\n", ret);
428 ret = regmap_read(cs35l56_base->regmap, CS35L56_PROTECTION_STATUS, &val);
430 dev_err(cs35l56_base->dev, "Failed to read PROTECTION_STATUS: %d\n", ret);
434 pm_runtime_put_autosuspend(cs35l56_base->dev);
449 int cs35l56_runtime_suspend_common(struct cs35l56_base *cs35l56_base)
454 if (!cs35l56_base->init_done)
458 ret = regmap_read_poll_timeout(cs35l56_base->regmap,
464 dev_warn(cs35l56_base->dev, "PS3 wait failed: %d\n", ret);
467 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_EINT_4, CS35L56_OTP_BOOT_DONE_MASK);
469 if (!cs35l56_base->can_hibernate) {
470 regcache_cache_only(cs35l56_base->regmap, true);
471 dev_dbg(cs35l56_base->dev, "Suspended: no hibernate");
480 cs35l56_mbox_send(cs35l56_base, CS35L56_MBOX_CMD_ALLOW_AUTO_HIBERNATE);
486 regcache_cache_only(cs35l56_base->regmap, true);
488 regmap_multi_reg_write_bypassed(cs35l56_base->regmap,
492 dev_dbg(cs35l56_base->dev, "Suspended: hibernate");
498 int cs35l56_runtime_resume_common(struct cs35l56_base *cs35l56_base, bool is_soundwire)
503 if (!cs35l56_base->init_done)
506 if (!cs35l56_base->can_hibernate)
514 regmap_multi_reg_write_bypassed(cs35l56_base->regmap,
522 regcache_cache_only(cs35l56_base->regmap, false);
524 ret = cs35l56_wait_for_firmware_boot(cs35l56_base);
526 dev_err(cs35l56_base->dev, "Hibernate wake failed: %d\n", ret);
530 ret = cs35l56_mbox_send(cs35l56_base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE);
535 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_EINT_4, &val);
537 dev_dbg(cs35l56_base->dev, "Registers reset in suspend\n");
538 regcache_mark_dirty(cs35l56_base->regmap);
541 regcache_sync(cs35l56_base->regmap);
543 dev_dbg(cs35l56_base->dev, "Resumed");
548 regmap_write(cs35l56_base->regmap, CS35L56_DSP_VIRTUAL1_MBOX_1,
551 regcache_cache_only(cs35l56_base->regmap, true);
565 void cs35l56_init_cs_dsp(struct cs35l56_base *cs35l56_base, struct cs_dsp *cs_dsp)
570 cs_dsp->dev = cs35l56_base->dev;
571 cs_dsp->regmap = cs35l56_base->regmap;
580 int cs35l56_hw_init(struct cs35l56_base *cs35l56_base)
589 if (!cs35l56_base->reset_gpio)
590 regmap_read(cs35l56_base->regmap, CS35L56_DSP_VIRTUAL1_MBOX_1, &devid);
599 ret = regmap_read(cs35l56_base->regmap, CS35L56_REVID, &revid);
601 dev_err(cs35l56_base->dev, "Get Revision ID failed\n");
604 cs35l56_base->rev = revid & (CS35L56_AREVID_MASK | CS35L56_MTLREVID_MASK);
606 ret = cs35l56_wait_for_firmware_boot(cs35l56_base);
610 ret = regmap_read(cs35l56_base->regmap, CS35L56_DEVID, &devid);
612 dev_err(cs35l56_base->dev, "Get Device ID failed\n");
621 dev_err(cs35l56_base->dev, "Unknown device %x\n", devid);
625 ret = regmap_read(cs35l56_base->regmap, CS35L56_DSP_RESTRICT_STS1, &secured);
627 dev_err(cs35l56_base->dev, "Get Secure status failed\n");
633 cs35l56_base->secured = true;
635 ret = regmap_read(cs35l56_base->regmap, CS35L56_OTPID, &otpid);
637 dev_err(cs35l56_base->dev, "Get OTP ID failed\n");
641 dev_info(cs35l56_base->dev, "Cirrus Logic CS35L56%s Rev %02X OTP%d\n",
642 cs35l56_base->secured ? "s" : "", cs35l56_base->rev, otpid);
645 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_MASK_20, 0xffffffff);
646 regmap_update_bits(cs35l56_base->regmap, CS35L56_IRQ1_MASK_1,
649 regmap_update_bits(cs35l56_base->regmap, CS35L56_IRQ1_MASK_8,