Lines Matching refs:regmap
12 #include <linux/regmap.h>
779 int cs35l41_test_key_unlock(struct device *dev, struct regmap *regmap)
787 ret = regmap_multi_reg_write(regmap, unlock, ARRAY_SIZE(unlock));
795 int cs35l41_test_key_lock(struct device *dev, struct regmap *regmap)
803 ret = regmap_multi_reg_write(regmap, unlock, ARRAY_SIZE(unlock));
812 int cs35l41_otp_unpack(struct device *dev, struct regmap *regmap)
825 ret = regmap_read(regmap, CS35L41_OTPID, &otp_id_reg);
839 ret = regmap_bulk_read(regmap, CS35L41_OTP_MEM0, otp_mem, CS35L41_OTP_SIZE_WORDS);
876 ret = regmap_update_bits(regmap, otp_map[i].reg,
897 int cs35l41_register_errata_patch(struct device *dev, struct regmap *reg, unsigned int reg_revid)
935 int cs35l41_set_channels(struct device *dev, struct regmap *reg,
985 static int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_ind,
1036 ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_COEFF,
1047 ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_SLOPE_LBST,
1059 ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_PEAK_CUR, CS35L41_BST_IPK_MASK,
1066 regmap_update_bits(regmap, CS35L41_PWR_CTRL2, CS35L41_BST_EN_MASK,
1137 int cs35l41_init_boost(struct device *dev, struct regmap *regmap,
1144 regmap_multi_reg_write(regmap, cs35l41_actv_seq, ARRAY_SIZE(cs35l41_actv_seq));
1147 ret = cs35l41_boost_config(dev, regmap, hw_cfg->bst_ind,
1158 regmap_write(regmap, CS35L41_GPIO1_CTRL1, 0x00000001);
1159 regmap_multi_reg_write(regmap, cs35l41_reset_to_safe,
1161 ret = regmap_update_bits(regmap, CS35L41_PWR_CTRL2, CS35L41_BST_EN_MASK,
1165 ret = regmap_multi_reg_write(regmap, cs35l41_pass_seq,
1178 bool cs35l41_safe_reset(struct regmap *regmap, enum cs35l41_boost_type b_type)
1185 regmap_write(regmap, CS35L41_GPIO1_CTRL1, 0x00000001);
1186 regmap_multi_reg_write(regmap, cs35l41_safe_to_reset,
1215 int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l41_boost_type b_type,
1229 ret = regmap_read(regmap, CS35L41_PWR_CTRL1, &pwr_ctl1_val);
1244 regmap_read(regmap, CS35L41_PWR_CTRL3, &pwr_ctrl3);
1245 regmap_read(regmap, CS35L41_GPIO_PAD_CONTROL, &pad_control);
1260 ret = regmap_multi_reg_write(regmap, cs35l41_mdsync_down_seq,
1266 ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1,
1273 regmap_write(regmap, CS35L41_IRQ1_STATUS1, pup_pdn_mask);
1276 ret = regmap_update_bits(regmap, CS35L41_PWR_CTRL1, CS35L41_GLOBAL_EN_MASK,
1283 ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1,
1290 regmap_write(regmap, CS35L41_IRQ1_STATUS1, pup_pdn_mask);
1296 ret = regmap_multi_reg_write(regmap, cs35l41_safe_to_active_start,
1301 ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1, int_status,
1306 cs35l41_test_key_lock(dev, regmap);
1309 regmap_write(regmap, CS35L41_IRQ1_STATUS1, CS35L41_PUP_DONE_MASK);
1312 ret = cs35l41_set_cspl_mbox_cmd(dev, regmap,
1315 ret = regmap_multi_reg_write(regmap, cs35l41_safe_to_active_en_spk,
1319 cs35l41_test_key_lock(dev, regmap);
1322 ret = regmap_multi_reg_write(regmap, cs35l41_active_to_safe_start,
1326 cs35l41_test_key_lock(dev, regmap);
1330 ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1, int_status,
1335 cs35l41_test_key_lock(dev, regmap);
1338 regmap_write(regmap, CS35L41_IRQ1_STATUS1, CS35L41_PDN_DONE_MASK);
1341 ret = regmap_multi_reg_write(regmap, cs35l41_active_to_safe_end,
1358 int cs35l41_mdsync_up(struct regmap *regmap)
1360 return regmap_update_bits(regmap, CS35L41_PWR_CTRL3,
1365 int cs35l41_gpio_config(struct regmap *regmap, struct cs35l41_hw_cfg *hw_cfg)
1371 regmap_update_bits(regmap, CS35L41_GPIO1_CTRL1,
1376 regmap_update_bits(regmap, CS35L41_GPIO2_CTRL1,
1382 regmap_update_bits(regmap, CS35L41_GPIO_PAD_CONTROL, CS35L41_GPIO1_CTRL_MASK,
1386 regmap_update_bits(regmap, CS35L41_GPIO_PAD_CONTROL, CS35L41_GPIO2_CTRL_MASK,
1414 void cs35l41_configure_cs_dsp(struct device *dev, struct regmap *reg, struct cs_dsp *dsp)
1420 dsp->regmap = reg;
1452 int cs35l41_set_cspl_mbox_cmd(struct device *dev, struct regmap *regmap,
1459 ret = regmap_write(regmap, CS35L41_DSP_VIRT1_MBOX_1, cmd);
1470 ret = regmap_read(regmap, CS35L41_DSP_MBOX_2, &sts);
1489 int cs35l41_write_fs_errata(struct device *dev, struct regmap *regmap)
1493 ret = regmap_multi_reg_write(regmap, cs35l41_fs_errata_patch,
1502 int cs35l41_enter_hibernate(struct device *dev, struct regmap *regmap,
1505 if (!cs35l41_safe_reset(regmap, b_type)) {
1511 regmap_write(regmap, CS35L41_WAKESRC_CTL, 0x0088);
1512 regmap_write(regmap, CS35L41_WAKESRC_CTL, 0x0188);
1515 regmap_write(regmap, CS35L41_DSP_VIRT1_MBOX_1, CSPL_MBOX_CMD_HIBERNATE);
1521 static void cs35l41_wait_for_pwrmgt_sts(struct device *dev, struct regmap *regmap)
1528 ret = regmap_read(regmap, CS35L41_PWRMGT_STS, &sts);
1540 int cs35l41_exit_hibernate(struct device *dev, struct regmap *regmap)
1550 ret = cs35l41_set_cspl_mbox_cmd(dev, regmap,
1565 cs35l41_wait_for_pwrmgt_sts(dev, regmap);
1566 regmap_write(regmap, CS35L41_WAKESRC_CTL, 0x0088);
1568 cs35l41_wait_for_pwrmgt_sts(dev, regmap);
1569 regmap_write(regmap, CS35L41_WAKESRC_CTL, 0x0188);
1571 cs35l41_wait_for_pwrmgt_sts(dev, regmap);
1572 regmap_write(regmap, CS35L41_PWRMGT_CTL, 0x3);