Lines Matching refs:PW_MGMT3
112 #define PW_MGMT3 0x02 /* Power Management 3 */
143 /* PW_MGMT3 */
336 SND_SOC_DAPM_DAC("DAC1", NULL, PW_MGMT3, 0, 0),
337 SND_SOC_DAPM_DAC("DAC2", NULL, PW_MGMT3, 1, 0),
338 SND_SOC_DAPM_DAC("DAC3", NULL, PW_MGMT3, 2, 0),
339 SND_SOC_DAPM_DAC("DAC4", NULL, PW_MGMT3, 3, 0),
340 SND_SOC_DAPM_DAC("DAC5", NULL, PW_MGMT3, 4, 0),
341 SND_SOC_DAPM_DAC("DAC6", NULL, PW_MGMT3, 5, 0),
690 * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks
703 mgmt3 = snd_soc_component_read(component, PW_MGMT3);
706 snd_soc_component_write(component, PW_MGMT3, mgmt3);
718 * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks