Lines Matching refs:value
60 (0 << 1) /* Load sample regardless of validity bit value */
576 memcpy(uvalue->value.iec958.status, ch_stat->data,
608 memset(uvalue->value.iec958.status, 0xff,
609 sizeof(uvalue->value.iec958.status));
659 memcpy(uvalue->value.iec958.subcode, user_data->data,
693 uinfo->value.integer.min = 0;
694 uinfo->value.integer.max = 1;
716 * The RSR.ULOCK has wrong value if both pclk and gclk are enabled
727 uvalue->value.integer.value[0] = ctrl->ulock;
754 * The RSR.ULOCK has wrong value if both pclk and gclk are enabled
770 uvalue->value.integer.value[0] = ctrl->badf;
824 uvalue->value.integer.value[0] = ctrl->signal;
834 uinfo->value.integer.min = 0;
835 uinfo->value.integer.max = 192000;
856 * The RSR.ULOCK has wrong value if both pclk and gclk are enabled
864 ucontrol->value.integer.value[0] = 0;
869 ucontrol->value.integer.value[0] = 0;
875 ucontrol->value.integer.value[0] = rate / (32 * SPDIFRX_RSR_IFS(val));
1137 * called lead to invalid value returned for signal. Thus, configure