Lines Matching refs:dev
239 struct device *dev;
260 struct mchp_i2s_mcc_dev *dev = dev_id;
264 regmap_read(dev->regmap, MCHP_I2SMCC_IMRA, &imra);
265 regmap_read(dev->regmap, MCHP_I2SMCC_ISRA, &sra);
268 regmap_read(dev->regmap, MCHP_I2SMCC_IMRB, &imrb);
269 regmap_read(dev->regmap, MCHP_I2SMCC_ISRB, &srb);
279 if (dev->soc->has_fifo) {
283 idra |= pendinga & (MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels) |
284 MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels));
289 if ((!dev->soc->has_fifo &&
290 (imra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels)) &&
291 (imra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels)) ==
292 (idra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels))) ||
293 (dev->soc->has_fifo && imrb & MCHP_I2SMCC_INT_TXFFRDY)) {
294 dev->tx_rdy = 1;
295 wake_up_interruptible(&dev->wq_txrdy);
297 if ((!dev->soc->has_fifo &&
298 (imra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels)) &&
299 (imra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels)) ==
300 (idra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels))) ||
301 (dev->soc->has_fifo && imrb & MCHP_I2SMCC_INT_RXFFRDY)) {
302 dev->rx_rdy = 1;
303 wake_up_interruptible(&dev->wq_rxrdy);
305 if (dev->soc->has_fifo)
306 regmap_write(dev->regmap, MCHP_I2SMCC_IDRB, idrb);
308 regmap_write(dev->regmap, MCHP_I2SMCC_IDRA, idra);
316 struct mchp_i2s_mcc_dev *dev = snd_soc_dai_get_drvdata(dai);
318 dev_dbg(dev->dev, "%s() clk_id=%d freq=%u dir=%d\n",
325 dev->sysclk = freq;
333 struct mchp_i2s_mcc_dev *dev = snd_soc_dai_get_drvdata(dai);
335 dev_dbg(dev->dev, "%s() ratio=%u\n", __func__, ratio);
337 dev->frame_length = ratio;
344 struct mchp_i2s_mcc_dev *dev = snd_soc_dai_get_drvdata(dai);
346 dev_dbg(dev->dev, "%s() fmt=%#x\n", __func__, fmt);
360 dev->fmt = fmt;
370 struct mchp_i2s_mcc_dev *dev = snd_soc_dai_get_drvdata(dai);
372 dev_dbg(dev->dev,
387 dev->tdm_slots = slots;
388 dev->frame_length = slots * MCHP_I2MCC_TDM_SLOT_WIDTH;
416 static int mchp_i2s_mcc_config_divs(struct mchp_i2s_mcc_dev *dev,
428 if (!dev->sysclk)
431 sysclk = dev->sysclk;
447 ret = mchp_i2s_mcc_clk_get_rate_diff(dev->gclk, clk_rate,
451 dev_err(dev->dev, "gclk error for rate %lu: %d",
455 dev_dbg(dev->dev, "found perfect rate on gclk: %lu\n",
461 ret = mchp_i2s_mcc_clk_get_rate_diff(dev->pclk, clk_rate,
465 dev_err(dev->dev, "pclk error for rate %lu: %d",
469 dev_dbg(dev->dev, "found perfect rate on pclk: %lu\n",
478 dev_err(dev->dev, "unable to change rate to clocks\n");
482 dev_dbg(dev->dev, "source CLK is %s with rate %lu, diff %lu\n",
483 best_clk == dev->pclk ? "pclk" : "gclk",
487 if (dev->sysclk)
491 if (best_clk == dev->gclk)
499 static int mchp_i2s_mcc_is_running(struct mchp_i2s_mcc_dev *dev)
503 regmap_read(dev->regmap, MCHP_I2SMCC_SR, &sr);
512 struct mchp_i2s_mcc_dev *dev = snd_soc_dai_get_drvdata(dai);
516 unsigned int frame_length = dev->frame_length;
522 dev_dbg(dev->dev, "%s() rate=%u format=%#x width=%u channels=%u\n",
526 switch (dev->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
528 if (dev->tdm_slots) {
529 dev_err(dev->dev, "I2S with TDM is not supported\n");
535 if (dev->tdm_slots) {
536 dev_err(dev->dev, "Left-Justified with TDM is not supported\n");
545 dev_err(dev->dev, "unsupported bus format\n");
549 switch (dev->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
553 if (dev->sysclk)
565 if (dev->sysclk)
566 dev_warn(dev->dev, "Unable to generate MCLK in Slave mode\n");
569 dev_err(dev->dev, "unsupported master/slave mode\n");
573 if (dev->fmt & (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J)) {
575 if (channels > dev->soc->data_pin_pair_num * 2) {
576 dev_err(dev->dev,
601 dev_err(dev->dev, "unsupported number of audio channels\n");
607 } else if (dev->fmt & SND_SOC_DAIFMT_DSP_A) {
608 mra |= MCHP_I2SMCC_MRA_WIRECFG_TDM(dev->tdm_data_pair);
610 if (dev->tdm_slots) {
611 if (channels % 2 && channels * 2 <= dev->tdm_slots) {
621 channels = dev->tdm_slots;
635 dev->playback.maxburst = 1 << (fls(channels) - 1);
637 dev->capture.maxburst = 1 << (fls(channels) - 1);
665 dev_err(dev->dev, "unsupported size/endianness for audio samples\n");
671 ret = mchp_i2s_mcc_config_divs(dev, bclk_rate, &mra,
674 dev_err(dev->dev,
681 if (dev->soc->has_fifo)
688 if (mchp_i2s_mcc_is_running(dev)) {
692 regmap_read(dev->regmap, MCHP_I2SMCC_MRA, &mra_cur);
693 regmap_read(dev->regmap, MCHP_I2SMCC_MRB, &mrb_cur);
700 if (mra & MCHP_I2SMCC_MRA_SRCCLK_GCLK && !dev->gclk_use) {
702 ret = clk_set_rate(dev->gclk, rate);
704 dev_err(dev->dev,
710 ret = clk_prepare(dev->gclk);
712 dev_err(dev->dev, "unable to prepare GCLK: %d\n", ret);
715 dev->gclk_use = 1;
719 dev->channels = channels;
721 ret = regmap_write(dev->regmap, MCHP_I2SMCC_MRA, mra);
723 if (dev->gclk_use) {
724 clk_unprepare(dev->gclk);
725 dev->gclk_use = 0;
729 return regmap_write(dev->regmap, MCHP_I2SMCC_MRB, mrb);
735 struct mchp_i2s_mcc_dev *dev = snd_soc_dai_get_drvdata(dai);
740 err = wait_event_interruptible_timeout(dev->wq_txrdy,
741 dev->tx_rdy,
744 dev_warn_once(dev->dev,
746 if (dev->soc->has_fifo)
747 regmap_write(dev->regmap, MCHP_I2SMCC_IDRB,
750 regmap_write(dev->regmap, MCHP_I2SMCC_IDRA,
751 MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels));
753 dev->tx_rdy = 1;
756 err = wait_event_interruptible_timeout(dev->wq_rxrdy,
757 dev->rx_rdy,
760 dev_warn_once(dev->dev,
762 if (dev->soc->has_fifo)
763 regmap_write(dev->regmap, MCHP_I2SMCC_IDRB,
766 regmap_write(dev->regmap, MCHP_I2SMCC_IDRA,
767 MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels));
768 dev->rx_rdy = 1;
772 if (!mchp_i2s_mcc_is_running(dev)) {
773 regmap_write(dev->regmap, MCHP_I2SMCC_CR, MCHP_I2SMCC_CR_CKDIS);
775 if (dev->gclk_running) {
776 clk_disable(dev->gclk);
777 dev->gclk_running = 0;
779 if (dev->gclk_use) {
780 clk_unprepare(dev->gclk);
781 dev->gclk_use = 0;
791 struct mchp_i2s_mcc_dev *dev = snd_soc_dai_get_drvdata(dai);
810 regmap_read(dev->regmap, MCHP_I2SMCC_SR, &sr);
813 dev->tx_rdy = 0;
818 if (dev->soc->has_fifo)
821 iera = MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels);
824 dev->rx_rdy = 0;
829 if (dev->soc->has_fifo)
832 iera = MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels);
839 if ((cr & MCHP_I2SMCC_CR_CKEN) && dev->gclk_use &&
840 !dev->gclk_running) {
841 err = clk_enable(dev->gclk);
843 dev_err_once(dev->dev, "failed to enable GCLK: %d\n",
846 dev->gclk_running = 1;
850 if (dev->soc->has_fifo)
851 regmap_write(dev->regmap, MCHP_I2SMCC_IERB, ierb);
853 regmap_write(dev->regmap, MCHP_I2SMCC_IERA, iera);
854 regmap_write(dev->regmap, MCHP_I2SMCC_CR, cr);
862 struct mchp_i2s_mcc_dev *dev = snd_soc_dai_get_drvdata(dai);
865 if (!mchp_i2s_mcc_is_running(dev)) {
866 return regmap_write(dev->regmap, MCHP_I2SMCC_CR,
875 struct mchp_i2s_mcc_dev *dev = snd_soc_dai_get_drvdata(dai);
877 init_waitqueue_head(&dev->wq_txrdy);
878 init_waitqueue_head(&dev->wq_rxrdy);
879 dev->tx_rdy = 1;
880 dev->rx_rdy = 1;
882 snd_soc_dai_init_dma_data(dai, &dev->playback, &dev->capture);
960 struct mchp_i2s_mcc_dev *dev)
964 if (!dev->soc) {
965 dev_err(&pdev->dev, "failed to get soc data\n");
969 if (dev->soc->data_pin_pair_num == 1)
972 err = of_property_read_u8(pdev->dev.of_node, "microchip,tdm-data-pair",
973 &dev->tdm_data_pair);
975 dev_err(&pdev->dev,
981 dev_info(&pdev->dev,
983 dev->tdm_data_pair = 0;
985 if (dev->tdm_data_pair > dev->soc->data_pin_pair_num - 1) {
986 dev_err(&pdev->dev,
988 dev->tdm_data_pair);
991 dev_dbg(&pdev->dev, "TMD format on DIN/DOUT %d pins\n",
992 dev->tdm_data_pair);
1000 struct mchp_i2s_mcc_dev *dev;
1008 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
1009 if (!dev)
1016 regmap = devm_regmap_init_mmio(&pdev->dev, base,
1025 err = devm_request_irq(&pdev->dev, irq, mchp_i2s_mcc_interrupt, 0,
1026 dev_name(&pdev->dev), dev);
1030 dev->pclk = devm_clk_get(&pdev->dev, "pclk");
1031 if (IS_ERR(dev->pclk)) {
1032 err = PTR_ERR(dev->pclk);
1033 dev_err(&pdev->dev,
1039 dev->gclk = devm_clk_get(&pdev->dev, "gclk");
1040 if (IS_ERR(dev->gclk)) {
1041 if (PTR_ERR(dev->gclk) == -EPROBE_DEFER)
1043 dev_warn(&pdev->dev,
1045 dev->gclk = NULL;
1048 dev->soc = of_device_get_match_data(&pdev->dev);
1049 err = mchp_i2s_mcc_soc_data_parse(pdev, dev);
1053 dev->dev = &pdev->dev;
1054 dev->regmap = regmap;
1055 platform_set_drvdata(pdev, dev);
1057 err = clk_prepare_enable(dev->pclk);
1059 dev_err(&pdev->dev,
1064 err = devm_snd_soc_register_component(&pdev->dev,
1068 dev_err(&pdev->dev, "failed to register DAI: %d\n", err);
1069 clk_disable_unprepare(dev->pclk);
1073 dev->playback.addr = (dma_addr_t)mem->start + MCHP_I2SMCC_THR;
1074 dev->capture.addr = (dma_addr_t)mem->start + MCHP_I2SMCC_RHR;
1076 err = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
1078 dev_err(&pdev->dev, "failed to register PCM: %d\n", err);
1079 clk_disable_unprepare(dev->pclk);
1084 regmap_read(dev->regmap, MCHP_I2SMCC_VERSION, &version);
1085 dev_info(&pdev->dev, "hw version: %#lx\n",
1093 struct mchp_i2s_mcc_dev *dev = platform_get_drvdata(pdev);
1095 clk_disable_unprepare(dev->pclk);