Lines Matching defs:acp_base
55 val = rn_readl(rn_pdm_data->acp_base + ACP_EXTERNAL_INTR_STAT);
57 rn_writel(BIT(PDM_DMA_STAT), rn_pdm_data->acp_base +
72 void __iomem *acp_base)
74 rn_writel(physical_addr, acp_base + ACP_WOV_RX_RINGBUFADDR);
75 rn_writel(buffer_size, acp_base + ACP_WOV_RX_RINGBUFSIZE);
76 rn_writel(watermark_size, acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
77 rn_writel(0x01, acp_base + ACPAXI2AXI_ATU_CTRL);
80 static void enable_pdm_clock(void __iomem *acp_base)
86 rn_writel(pdm_clk_enable, acp_base + ACP_WOV_CLK_CTRL);
87 pdm_ctrl = rn_readl(acp_base + ACP_WOV_MISC_CTRL);
90 rn_writel(pdm_ctrl, acp_base + ACP_WOV_MISC_CTRL);
93 static void enable_pdm_interrupts(void __iomem *acp_base)
97 ext_int_ctrl = rn_readl(acp_base + ACP_EXTERNAL_INTR_CNTL);
99 rn_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL);
102 static void disable_pdm_interrupts(void __iomem *acp_base)
106 ext_int_ctrl = rn_readl(acp_base + ACP_EXTERNAL_INTR_CNTL);
108 rn_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL);
111 static bool check_pdm_dma_status(void __iomem *acp_base)
117 pdm_enable = rn_readl(acp_base + ACP_WOV_PDM_ENABLE);
118 pdm_dma_enable = rn_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
125 static int start_pdm_dma(void __iomem *acp_base)
134 enable_pdm_clock(acp_base);
135 rn_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE);
136 rn_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE);
139 pdm_dma_enable = rn_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
147 static int stop_pdm_dma(void __iomem *acp_base)
152 pdm_enable = rn_readl(acp_base + ACP_WOV_PDM_ENABLE);
153 pdm_dma_enable = rn_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
156 rn_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE);
159 pdm_dma_enable = rn_readl(acp_base +
170 rn_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE);
172 rn_writel(0x01, acp_base + ACP_WOV_PDM_FIFO_FLUSH);
186 rn_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp_base +
188 rn_writel(PAGE_SIZE_4K_ENABLE, rtd->acp_base +
196 rn_writel(low, rtd->acp_base + ACP_SCRATCH_REG_0 + val);
198 rn_writel(high, rtd->acp_base + ACP_SCRATCH_REG_0 + val + 4);
229 enable_pdm_interrupts(adata->acp_base);
234 pdm_data->acp_base = adata->acp_base;
255 rtd->acp_base);
265 rn_readl(rtd->acp_base +
268 rn_readl(rtd->acp_base +
305 disable_pdm_interrupts(adata->acp_base);
331 rn_writel(ch_mask, rtd->acp_base + ACP_WOV_PDM_NO_OF_CHANNELS);
332 rn_writel(PDM_DECIMATION_FACTOR, rtd->acp_base +
336 pdm_status = check_pdm_dma_status(rtd->acp_base);
338 ret = start_pdm_dma(rtd->acp_base);
343 pdm_status = check_pdm_dma_status(rtd->acp_base);
345 ret = stop_pdm_dma(rtd->acp_base);
404 adata->acp_base = devm_ioremap(&pdev->dev, res->start,
406 if (!adata->acp_base)
459 adata->acp_base);
461 enable_pdm_interrupts(adata->acp_base);
470 disable_pdm_interrupts(adata->acp_base);
480 enable_pdm_interrupts(adata->acp_base);