Lines Matching refs:areg
218 u32 areg; /* cached additional register value */
478 rme96->areg |= RME96_AR_CDATA;
480 rme96->areg &= ~RME96_AR_CDATA;
482 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CLATCH);
483 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
485 rme96->areg |= RME96_AR_CCLK;
486 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
490 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CDATA);
491 rme96->areg |= RME96_AR_CLATCH;
492 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
494 rme96->areg &= ~RME96_AR_CLATCH;
495 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
585 if (rme96->areg & RME96_AR_ANALOG) {
587 n = ((rme96->areg >> RME96_AR_BITPOS_F0) & 1) +
588 (((rme96->areg >> RME96_AR_BITPOS_F1) & 1) << 1);
602 return (rme96->areg & RME96_AR_BITPOS_F2) ? rate << 1 : rate;
732 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &
736 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |
740 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |
747 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &
754 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |
758 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |
764 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
776 rme96->areg &= ~RME96_AR_WSEL;
781 rme96->areg &= ~RME96_AR_WSEL;
786 rme96->areg |= RME96_AR_WSEL;
792 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
799 if (rme96->areg & RME96_AR_WSEL) {
841 rme96->areg |= RME96_AR_ANALOG;
842 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
860 rme96->areg &= ~RME96_AR_ANALOG;
861 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
870 if (rme96->areg & RME96_AR_ANALOG) {
1543 rme96->areg &= ~RME96_AR_DAC_EN;
1544 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1648 rme96->areg = RME96_AR_FREQPAD_1; /* set 44.1 kHz analog capture */
1651 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1654 writel(rme96->areg | RME96_AR_PD2,
1656 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1660 rme96->areg |= RME96_AR_DAC_EN;
1661 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1756 if (rme96->areg & RME96_AR_WSEL) {
2354 rme96->areg &= ~RME96_AR_DAC_EN;
2355 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
2377 writel(rme96->areg | RME96_AR_PD2,
2379 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
2383 rme96->areg |= RME96_AR_DAC_EN;
2384 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);