Lines Matching defs:rme96
208 struct rme96 {
256 #define RME96_ISPLAYING(rme96) ((rme96)->wcreg & RME96_WCR_START)
257 #define RME96_ISRECORDING(rme96) ((rme96)->wcreg & RME96_WCR_START_2)
258 #define RME96_HAS_ANALOG_IN(rme96) ((rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST)
259 #define RME96_HAS_ANALOG_OUT(rme96) ((rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PRO || \
260 (rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST)
261 #define RME96_DAC_IS_1852(rme96) (RME96_HAS_ANALOG_OUT(rme96) && (rme96)->rev >= 4)
262 #define RME96_DAC_IS_1855(rme96) (((rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST && (rme96)->rev < 4) || \
263 ((rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PRO && (rme96)->rev == 2))
264 #define RME96_185X_MAX_OUT(rme96) ((1 << (RME96_DAC_IS_1852(rme96) ? RME96_AD1852_VOL_BITS : RME96_AD1855_VOL_BITS)) - 1)
286 static void snd_rme96_proc_init(struct rme96 *rme96);
290 struct rme96 *rme96);
293 snd_rme96_getinputtype(struct rme96 *rme96);
296 snd_rme96_playback_ptr(struct rme96 *rme96)
298 return (readl(rme96->iobase + RME96_IO_GET_PLAY_POS)
299 & RME96_RCR_AUDIO_ADDR_MASK) >> rme96->playback_frlog;
303 snd_rme96_capture_ptr(struct rme96 *rme96)
305 return (readl(rme96->iobase + RME96_IO_GET_REC_POS)
306 & RME96_RCR_AUDIO_ADDR_MASK) >> rme96->capture_frlog;
313 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
315 memset_io(rme96->iobase + RME96_IO_PLAY_BUFFER + pos,
325 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
327 return copy_from_iter_toio(rme96->iobase + RME96_IO_PLAY_BUFFER + pos,
336 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
339 rme96->iobase + RME96_IO_REC_BUFFER + pos,
472 snd_rme96_write_SPI(struct rme96 *rme96, u16 val)
478 rme96->areg |= RME96_AR_CDATA;
480 rme96->areg &= ~RME96_AR_CDATA;
482 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CLATCH);
483 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
485 rme96->areg |= RME96_AR_CCLK;
486 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
490 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CDATA);
491 rme96->areg |= RME96_AR_CLATCH;
492 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
494 rme96->areg &= ~RME96_AR_CLATCH;
495 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
499 snd_rme96_apply_dac_volume(struct rme96 *rme96)
501 if (RME96_DAC_IS_1852(rme96)) {
502 snd_rme96_write_SPI(rme96, (rme96->vol[0] << 2) | 0x0);
503 snd_rme96_write_SPI(rme96, (rme96->vol[1] << 2) | 0x2);
504 } else if (RME96_DAC_IS_1855(rme96)) {
505 snd_rme96_write_SPI(rme96, (rme96->vol[0] & 0x3FF) | 0x000);
506 snd_rme96_write_SPI(rme96, (rme96->vol[1] & 0x3FF) | 0x400);
511 snd_rme96_reset_dac(struct rme96 *rme96)
513 writel(rme96->wcreg | RME96_WCR_PD,
514 rme96->iobase + RME96_IO_CONTROL_REGISTER);
515 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
519 snd_rme96_getmontracks(struct rme96 *rme96)
521 return ((rme96->wcreg >> RME96_WCR_BITPOS_MONITOR_0) & 1) +
522 (((rme96->wcreg >> RME96_WCR_BITPOS_MONITOR_1) & 1) << 1);
526 snd_rme96_setmontracks(struct rme96 *rme96,
530 rme96->wcreg |= RME96_WCR_MONITOR_0;
532 rme96->wcreg &= ~RME96_WCR_MONITOR_0;
535 rme96->wcreg |= RME96_WCR_MONITOR_1;
537 rme96->wcreg &= ~RME96_WCR_MONITOR_1;
539 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
544 snd_rme96_getattenuation(struct rme96 *rme96)
546 return ((rme96->wcreg >> RME96_WCR_BITPOS_GAIN_0) & 1) +
547 (((rme96->wcreg >> RME96_WCR_BITPOS_GAIN_1) & 1) << 1);
551 snd_rme96_setattenuation(struct rme96 *rme96,
556 rme96->wcreg = (rme96->wcreg & ~RME96_WCR_GAIN_0) &
560 rme96->wcreg = (rme96->wcreg | RME96_WCR_GAIN_0) &
564 rme96->wcreg = (rme96->wcreg & ~RME96_WCR_GAIN_0) |
568 rme96->wcreg = (rme96->wcreg | RME96_WCR_GAIN_0) |
574 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
579 snd_rme96_capture_getrate(struct rme96 *rme96,
585 if (rme96->areg & RME96_AR_ANALOG) {
587 n = ((rme96->areg >> RME96_AR_BITPOS_F0) & 1) +
588 (((rme96->areg >> RME96_AR_BITPOS_F1) & 1) << 1);
602 return (rme96->areg & RME96_AR_BITPOS_F2) ? rate << 1 : rate;
605 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
606 if (rme96->rcreg & RME96_RCR_LOCK) {
609 if (rme96->rcreg & RME96_RCR_T_OUT) {
615 if (rme96->rcreg & RME96_RCR_VERF) {
620 n = ((rme96->rcreg >> RME96_RCR_BITPOS_F0) & 1) +
621 (((rme96->rcreg >> RME96_RCR_BITPOS_F1) & 1) << 1) +
622 (((rme96->rcreg >> RME96_RCR_BITPOS_F2) & 1) << 2);
626 if (rme96->rcreg & RME96_RCR_T_OUT) {
642 snd_rme96_playback_getrate(struct rme96 *rme96)
646 if (!(rme96->wcreg & RME96_WCR_MASTER) &&
647 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG) {
648 rate = snd_rme96_capture_getrate(rme96, &dummy);
655 rate = ((rme96->wcreg >> RME96_WCR_BITPOS_FREQ_0) & 1) +
656 (((rme96->wcreg >> RME96_WCR_BITPOS_FREQ_1) & 1) << 1);
670 return (rme96->wcreg & RME96_WCR_DS) ? rate << 1 : rate;
674 snd_rme96_playback_setrate(struct rme96 *rme96,
679 ds = rme96->wcreg & RME96_WCR_DS;
682 rme96->wcreg &= ~RME96_WCR_DS;
683 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) &
687 rme96->wcreg &= ~RME96_WCR_DS;
688 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_1) &
692 rme96->wcreg &= ~RME96_WCR_DS;
693 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) |
697 rme96->wcreg |= RME96_WCR_DS;
698 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) &
702 rme96->wcreg |= RME96_WCR_DS;
703 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_1) &
707 rme96->wcreg |= RME96_WCR_DS;
708 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) |
714 if ((!ds && rme96->wcreg & RME96_WCR_DS) ||
715 (ds && !(rme96->wcreg & RME96_WCR_DS)))
718 snd_rme96_reset_dac(rme96);
721 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
727 snd_rme96_capture_analog_setrate(struct rme96 *rme96,
732 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &
736 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |
740 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |
744 if (rme96->rev < 4) {
747 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &
751 if (rme96->rev < 4) {
754 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |
758 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |
764 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
769 snd_rme96_setclockmode(struct rme96 *rme96,
775 rme96->wcreg &= ~RME96_WCR_MASTER;
776 rme96->areg &= ~RME96_AR_WSEL;
780 rme96->wcreg |= RME96_WCR_MASTER;
781 rme96->areg &= ~RME96_AR_WSEL;
785 rme96->wcreg |= RME96_WCR_MASTER;
786 rme96->areg |= RME96_AR_WSEL;
791 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
792 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
797 snd_rme96_getclockmode(struct rme96 *rme96)
799 if (rme96->areg & RME96_AR_WSEL) {
802 return (rme96->wcreg & RME96_WCR_MASTER) ? RME96_CLOCKMODE_MASTER :
807 snd_rme96_setinputtype(struct rme96 *rme96,
814 rme96->wcreg = (rme96->wcreg & ~RME96_WCR_INP_0) &
818 rme96->wcreg = (rme96->wcreg | RME96_WCR_INP_0) &
822 rme96->wcreg = (rme96->wcreg & ~RME96_WCR_INP_0) |
826 if ((rme96->pci->device != PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST &&
827 rme96->pci->device != PCI_DEVICE_ID_RME_DIGI96_8_PRO) ||
828 (rme96->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST &&
829 rme96->rev > 4))
834 rme96->wcreg = (rme96->wcreg | RME96_WCR_INP_0) |
838 if (!RME96_HAS_ANALOG_IN(rme96)) {
841 rme96->areg |= RME96_AR_ANALOG;
842 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
843 if (rme96->rev < 4) {
848 if (snd_rme96_capture_getrate(rme96, &n) == 88200) {
849 snd_rme96_capture_analog_setrate(rme96, 44100);
851 if (snd_rme96_capture_getrate(rme96, &n) == 64000) {
852 snd_rme96_capture_analog_setrate(rme96, 32000);
859 if (type != RME96_INPUT_ANALOG && RME96_HAS_ANALOG_IN(rme96)) {
860 rme96->areg &= ~RME96_AR_ANALOG;
861 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
863 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
868 snd_rme96_getinputtype(struct rme96 *rme96)
870 if (rme96->areg & RME96_AR_ANALOG) {
873 return ((rme96->wcreg >> RME96_WCR_BITPOS_INP_0) & 1) +
874 (((rme96->wcreg >> RME96_WCR_BITPOS_INP_1) & 1) << 1);
878 snd_rme96_setframelog(struct rme96 *rme96,
891 frlog += (rme96->wcreg & RME96_WCR_MODE24) ? 2 : 1;
892 rme96->playback_frlog = frlog;
894 frlog += (rme96->wcreg & RME96_WCR_MODE24_2) ? 2 : 1;
895 rme96->capture_frlog = frlog;
900 snd_rme96_playback_setformat(struct rme96 *rme96, snd_pcm_format_t format)
904 rme96->wcreg &= ~RME96_WCR_MODE24;
907 rme96->wcreg |= RME96_WCR_MODE24;
912 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
917 snd_rme96_capture_setformat(struct rme96 *rme96, snd_pcm_format_t format)
921 rme96->wcreg &= ~RME96_WCR_MODE24_2;
924 rme96->wcreg |= RME96_WCR_MODE24_2;
929 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
934 snd_rme96_set_period_properties(struct rme96 *rme96,
939 rme96->wcreg &= ~RME96_WCR_ISEL;
942 rme96->wcreg |= RME96_WCR_ISEL;
948 rme96->wcreg &= ~RME96_WCR_IDIS;
949 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
956 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
961 runtime->dma_area = (void __force *)(rme96->iobase +
963 runtime->dma_addr = rme96->port + RME96_IO_PLAY_BUFFER;
966 spin_lock_irq(&rme96->lock);
968 if (!(rme96->wcreg & RME96_WCR_MASTER) &&
969 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG)
970 rate = snd_rme96_capture_getrate(rme96, &dummy);
978 err = snd_rme96_playback_setrate(rme96, params_rate(params));
984 err = snd_rme96_playback_setformat(rme96, params_format(params));
987 snd_rme96_setframelog(rme96, params_channels(params), 1);
988 if (rme96->capture_periodsize != 0) {
989 if (params_period_size(params) << rme96->playback_frlog !=
990 rme96->capture_periodsize)
996 rme96->playback_periodsize =
997 params_period_size(params) << rme96->playback_frlog;
998 snd_rme96_set_period_properties(rme96, rme96->playback_periodsize);
1000 if ((rme96->wcreg & RME96_WCR_ADAT) == 0) {
1001 rme96->wcreg &= ~(RME96_WCR_PRO | RME96_WCR_DOLBY | RME96_WCR_EMP);
1002 writel(rme96->wcreg |= rme96->wcreg_spdif_stream, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1007 spin_unlock_irq(&rme96->lock);
1010 snd_rme96_apply_dac_volume(rme96);
1020 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1024 runtime->dma_area = (void __force *)(rme96->iobase +
1026 runtime->dma_addr = rme96->port + RME96_IO_REC_BUFFER;
1029 spin_lock_irq(&rme96->lock);
1030 err = snd_rme96_capture_setformat(rme96, params_format(params));
1032 spin_unlock_irq(&rme96->lock);
1035 if (snd_rme96_getinputtype(rme96) == RME96_INPUT_ANALOG) {
1036 err = snd_rme96_capture_analog_setrate(rme96, params_rate(params));
1038 spin_unlock_irq(&rme96->lock);
1042 rate = snd_rme96_capture_getrate(rme96, &isadat);
1045 spin_unlock_irq(&rme96->lock);
1050 spin_unlock_irq(&rme96->lock);
1055 snd_rme96_setframelog(rme96, params_channels(params), 0);
1056 if (rme96->playback_periodsize != 0) {
1057 if (params_period_size(params) << rme96->capture_frlog !=
1058 rme96->playback_periodsize)
1060 spin_unlock_irq(&rme96->lock);
1064 rme96->capture_periodsize =
1065 params_period_size(params) << rme96->capture_frlog;
1066 snd_rme96_set_period_properties(rme96, rme96->capture_periodsize);
1067 spin_unlock_irq(&rme96->lock);
1073 snd_rme96_trigger(struct rme96 *rme96,
1077 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
1079 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
1081 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1082 if (rme96->rcreg & RME96_RCR_IRQ)
1083 writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ);
1086 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1087 if (rme96->rcreg & RME96_RCR_IRQ_2)
1088 writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ);
1091 rme96->wcreg |= RME96_WCR_START;
1093 rme96->wcreg &= ~RME96_WCR_START;
1095 rme96->wcreg |= RME96_WCR_START_2;
1097 rme96->wcreg &= ~RME96_WCR_START_2;
1098 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1107 struct rme96 *rme96 = (struct rme96 *)dev_id;
1109 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1111 if (!((rme96->rcreg & RME96_RCR_IRQ) ||
1112 (rme96->rcreg & RME96_RCR_IRQ_2)))
1117 if (rme96->rcreg & RME96_RCR_IRQ) {
1119 snd_pcm_period_elapsed(rme96->playback_substream);
1120 writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ);
1122 if (rme96->rcreg & RME96_RCR_IRQ_2) {
1124 snd_pcm_period_elapsed(rme96->capture_substream);
1125 writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ);
1139 rme96_set_buffer_size_constraint(struct rme96 *rme96,
1146 size = rme96->playback_periodsize;
1148 size = rme96->capture_periodsize;
1163 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1167 spin_lock_irq(&rme96->lock);
1168 if (rme96->playback_substream) {
1169 spin_unlock_irq(&rme96->lock);
1172 rme96->wcreg &= ~RME96_WCR_ADAT;
1173 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1174 rme96->playback_substream = substream;
1175 spin_unlock_irq(&rme96->lock);
1178 if (!(rme96->wcreg & RME96_WCR_MASTER) &&
1179 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG) {
1180 rate = snd_rme96_capture_getrate(rme96, &dummy);
1188 rme96_set_buffer_size_constraint(rme96, runtime);
1190 rme96->wcreg_spdif_stream = rme96->wcreg_spdif;
1191 rme96->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1192 snd_ctl_notify(rme96->card, SNDRV_CTL_EVENT_MASK_VALUE |
1193 SNDRV_CTL_EVENT_MASK_INFO, &rme96->spdif_ctl->id);
1201 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1206 if (snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG) {
1207 rate = snd_rme96_capture_getrate(rme96, &isadat);
1217 spin_lock_irq(&rme96->lock);
1218 if (rme96->capture_substream) {
1219 spin_unlock_irq(&rme96->lock);
1222 rme96->capture_substream = substream;
1223 spin_unlock_irq(&rme96->lock);
1225 rme96_set_buffer_size_constraint(rme96, runtime);
1233 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1237 spin_lock_irq(&rme96->lock);
1238 if (rme96->playback_substream) {
1239 spin_unlock_irq(&rme96->lock);
1242 rme96->wcreg |= RME96_WCR_ADAT;
1243 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1244 rme96->playback_substream = substream;
1245 spin_unlock_irq(&rme96->lock);
1248 if (!(rme96->wcreg & RME96_WCR_MASTER) &&
1249 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG) {
1250 rate = snd_rme96_capture_getrate(rme96, &dummy);
1259 rme96_set_buffer_size_constraint(rme96, runtime);
1267 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1272 if (snd_rme96_getinputtype(rme96) == RME96_INPUT_ANALOG) {
1277 rate = snd_rme96_capture_getrate(rme96, &isadat);
1287 spin_lock_irq(&rme96->lock);
1288 if (rme96->capture_substream) {
1289 spin_unlock_irq(&rme96->lock);
1292 rme96->capture_substream = substream;
1293 spin_unlock_irq(&rme96->lock);
1295 rme96_set_buffer_size_constraint(rme96, runtime);
1302 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1305 spin_lock_irq(&rme96->lock);
1306 if (RME96_ISPLAYING(rme96)) {
1307 snd_rme96_trigger(rme96, RME96_STOP_PLAYBACK);
1309 rme96->playback_substream = NULL;
1310 rme96->playback_periodsize = 0;
1311 spdif = (rme96->wcreg & RME96_WCR_ADAT) == 0;
1312 spin_unlock_irq(&rme96->lock);
1314 rme96->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1315 snd_ctl_notify(rme96->card, SNDRV_CTL_EVENT_MASK_VALUE |
1316 SNDRV_CTL_EVENT_MASK_INFO, &rme96->spdif_ctl->id);
1324 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1326 spin_lock_irq(&rme96->lock);
1327 if (RME96_ISRECORDING(rme96)) {
1328 snd_rme96_trigger(rme96, RME96_STOP_CAPTURE);
1330 rme96->capture_substream = NULL;
1331 rme96->capture_periodsize = 0;
1332 spin_unlock_irq(&rme96->lock);
1339 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1341 spin_lock_irq(&rme96->lock);
1342 if (RME96_ISPLAYING(rme96)) {
1343 snd_rme96_trigger(rme96, RME96_STOP_PLAYBACK);
1345 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
1346 spin_unlock_irq(&rme96->lock);
1353 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1355 spin_lock_irq(&rme96->lock);
1356 if (RME96_ISRECORDING(rme96)) {
1357 snd_rme96_trigger(rme96, RME96_STOP_CAPTURE);
1359 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
1360 spin_unlock_irq(&rme96->lock);
1368 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1373 if (snd_pcm_substream_chip(s) == rme96)
1377 sync = (rme96->playback_substream && rme96->capture_substream) &&
1378 (rme96->playback_substream->group ==
1379 rme96->capture_substream->group);
1383 if (!RME96_ISPLAYING(rme96)) {
1384 if (substream != rme96->playback_substream)
1386 snd_rme96_trigger(rme96, sync ? RME96_START_BOTH
1393 if (RME96_ISPLAYING(rme96)) {
1394 if (substream != rme96->playback_substream)
1396 snd_rme96_trigger(rme96, sync ? RME96_STOP_BOTH
1402 if (RME96_ISPLAYING(rme96))
1403 snd_rme96_trigger(rme96, sync ? RME96_STOP_BOTH
1409 if (!RME96_ISPLAYING(rme96))
1410 snd_rme96_trigger(rme96, sync ? RME96_RESUME_BOTH
1425 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1430 if (snd_pcm_substream_chip(s) == rme96)
1434 sync = (rme96->playback_substream && rme96->capture_substream) &&
1435 (rme96->playback_substream->group ==
1436 rme96->capture_substream->group);
1440 if (!RME96_ISRECORDING(rme96)) {
1441 if (substream != rme96->capture_substream)
1443 snd_rme96_trigger(rme96, sync ? RME96_START_BOTH
1450 if (RME96_ISRECORDING(rme96)) {
1451 if (substream != rme96->capture_substream)
1453 snd_rme96_trigger(rme96, sync ? RME96_STOP_BOTH
1459 if (RME96_ISRECORDING(rme96))
1460 snd_rme96_trigger(rme96, sync ? RME96_STOP_BOTH
1466 if (!RME96_ISRECORDING(rme96))
1467 snd_rme96_trigger(rme96, sync ? RME96_RESUME_BOTH
1481 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1482 return snd_rme96_playback_ptr(rme96);
1488 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1489 return snd_rme96_capture_ptr(rme96);
1539 snd_rme96_free(struct rme96 *rme96)
1541 if (rme96->irq >= 0) {
1542 snd_rme96_trigger(rme96, RME96_STOP_BOTH);
1543 rme96->areg &= ~RME96_AR_DAC_EN;
1544 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1547 vfree(rme96->playback_suspend_buffer);
1548 vfree(rme96->capture_suspend_buffer);
1555 struct rme96 *rme96 = pcm->private_data;
1556 rme96->spdif_pcm = NULL;
1562 struct rme96 *rme96 = pcm->private_data;
1563 rme96->adat_pcm = NULL;
1567 snd_rme96_create(struct rme96 *rme96)
1569 struct pci_dev *pci = rme96->pci;
1572 rme96->irq = -1;
1573 spin_lock_init(&rme96->lock);
1582 rme96->port = pci_resource_start(rme96->pci, 0);
1584 rme96->iobase = devm_ioremap(&pci->dev, rme96->port, RME96_IO_SIZE);
1585 if (!rme96->iobase) {
1586 dev_err(rme96->card->dev,
1588 rme96->port, rme96->port + RME96_IO_SIZE - 1);
1593 IRQF_SHARED, KBUILD_MODNAME, rme96)) {
1594 dev_err(rme96->card->dev, "unable to grab IRQ %d\n", pci->irq);
1597 rme96->irq = pci->irq;
1598 rme96->card->sync_irq = rme96->irq;
1601 pci_read_config_byte(pci, 8, &rme96->rev);
1604 err = snd_pcm_new(rme96->card, "Digi96 IEC958", 0,
1605 1, 1, &rme96->spdif_pcm);
1609 rme96->spdif_pcm->private_data = rme96;
1610 rme96->spdif_pcm->private_free = snd_rme96_free_spdif_pcm;
1611 strcpy(rme96->spdif_pcm->name, "Digi96 IEC958");
1612 snd_pcm_set_ops(rme96->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme96_playback_spdif_ops);
1613 snd_pcm_set_ops(rme96->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme96_capture_spdif_ops);
1615 rme96->spdif_pcm->info_flags = 0;
1620 rme96->adat_pcm = NULL;
1622 err = snd_pcm_new(rme96->card, "Digi96 ADAT", 1,
1623 1, 1, &rme96->adat_pcm);
1626 rme96->adat_pcm->private_data = rme96;
1627 rme96->adat_pcm->private_free = snd_rme96_free_adat_pcm;
1628 strcpy(rme96->adat_pcm->name, "Digi96 ADAT");
1629 snd_pcm_set_ops(rme96->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme96_playback_adat_ops);
1630 snd_pcm_set_ops(rme96->adat_pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme96_capture_adat_ops);
1632 rme96->adat_pcm->info_flags = 0;
1635 rme96->playback_periodsize = 0;
1636 rme96->capture_periodsize = 0;
1639 snd_rme96_trigger(rme96, RME96_STOP_BOTH);
1642 rme96->wcreg =
1648 rme96->areg = RME96_AR_FREQPAD_1; /* set 44.1 kHz analog capture */
1650 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1651 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1654 writel(rme96->areg | RME96_AR_PD2,
1655 rme96->iobase + RME96_IO_ADDITIONAL_REG);
1656 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1659 snd_rme96_reset_dac(rme96);
1660 rme96->areg |= RME96_AR_DAC_EN;
1661 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1664 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
1665 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
1668 rme96->vol[0] = rme96->vol[1] = 0;
1669 if (RME96_HAS_ANALOG_OUT(rme96)) {
1670 snd_rme96_apply_dac_volume(rme96);
1674 err = snd_rme96_create_switches(rme96->card, rme96);
1679 snd_rme96_proc_init(rme96);
1692 struct rme96 *rme96 = entry->private_data;
1694 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1696 snd_iprintf(buffer, rme96->card->longname);
1697 snd_iprintf(buffer, " (index #%d)\n", rme96->card->number + 1);
1700 if (rme96->wcreg & RME96_WCR_IDIS) {
1703 } else if (rme96->wcreg & RME96_WCR_ISEL) {
1709 switch (snd_rme96_getinputtype(rme96)) {
1726 if (snd_rme96_capture_getrate(rme96, &n) < 0) {
1735 snd_rme96_capture_getrate(rme96, &n));
1737 if (rme96->wcreg & RME96_WCR_MODE24_2) {
1744 if (rme96->wcreg & RME96_WCR_SEL) {
1750 snd_rme96_playback_getrate(rme96));
1751 if (rme96->wcreg & RME96_WCR_MODE24) {
1756 if (rme96->areg & RME96_AR_WSEL) {
1758 } else if (rme96->wcreg & RME96_WCR_MASTER) {
1760 } else if (snd_rme96_getinputtype(rme96) == RME96_INPUT_ANALOG) {
1762 } else if (snd_rme96_capture_getrate(rme96, &n) < 0) {
1767 if (rme96->wcreg & RME96_WCR_PRO) {
1772 if (rme96->wcreg & RME96_WCR_EMP) {
1777 if (rme96->wcreg & RME96_WCR_DOLBY) {
1782 if (RME96_HAS_ANALOG_IN(rme96)) {
1784 switch (snd_rme96_getmontracks(rme96)) {
1798 switch (snd_rme96_getattenuation(rme96)) {
1812 snd_iprintf(buffer, " volume left: %u\n", rme96->vol[0]);
1813 snd_iprintf(buffer, " volume right: %u\n", rme96->vol[1]);
1817 static void snd_rme96_proc_init(struct rme96 *rme96)
1819 snd_card_ro_proc_new(rme96->card, "rme96", rme96, snd_rme96_proc_read);
1831 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1833 spin_lock_irq(&rme96->lock);
1834 ucontrol->value.integer.value[0] = rme96->wcreg & RME96_WCR_SEL ? 0 : 1;
1835 spin_unlock_irq(&rme96->lock);
1841 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1846 spin_lock_irq(&rme96->lock);
1847 val = (rme96->wcreg & ~RME96_WCR_SEL) | val;
1848 change = val != rme96->wcreg;
1849 rme96->wcreg = val;
1850 writel(val, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1851 spin_unlock_irq(&rme96->lock);
1861 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1867 switch (rme96->pci->device) {
1876 if (rme96->rev > 4) {
1894 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1897 spin_lock_irq(&rme96->lock);
1898 ucontrol->value.enumerated.item[0] = snd_rme96_getinputtype(rme96);
1900 switch (rme96->pci->device) {
1909 if (rme96->rev > 4) {
1927 spin_unlock_irq(&rme96->lock);
1933 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1937 switch (rme96->pci->device) {
1946 if (rme96->rev > 4) {
1959 if (rme96->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST && rme96->rev > 4) {
1965 spin_lock_irq(&rme96->lock);
1966 change = (int)val != snd_rme96_getinputtype(rme96);
1967 snd_rme96_setinputtype(rme96, val);
1968 spin_unlock_irq(&rme96->lock);
1982 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1984 spin_lock_irq(&rme96->lock);
1985 ucontrol->value.enumerated.item[0] = snd_rme96_getclockmode(rme96);
1986 spin_unlock_irq(&rme96->lock);
1992 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1997 spin_lock_irq(&rme96->lock);
1998 change = (int)val != snd_rme96_getclockmode(rme96);
1999 snd_rme96_setclockmode(rme96, val);
2000 spin_unlock_irq(&rme96->lock);
2016 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2018 spin_lock_irq(&rme96->lock);
2019 ucontrol->value.enumerated.item[0] = snd_rme96_getattenuation(rme96);
2020 spin_unlock_irq(&rme96->lock);
2026 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2031 spin_lock_irq(&rme96->lock);
2033 change = (int)val != snd_rme96_getattenuation(rme96);
2034 snd_rme96_setattenuation(rme96, val);
2035 spin_unlock_irq(&rme96->lock);
2049 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2051 spin_lock_irq(&rme96->lock);
2052 ucontrol->value.enumerated.item[0] = snd_rme96_getmontracks(rme96);
2053 spin_unlock_irq(&rme96->lock);
2059 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2064 spin_lock_irq(&rme96->lock);
2065 change = (int)val != snd_rme96_getmontracks(rme96);
2066 snd_rme96_setmontracks(rme96, val);
2067 spin_unlock_irq(&rme96->lock);
2102 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2104 snd_rme96_convert_to_aes(&ucontrol->value.iec958, rme96->wcreg_spdif);
2110 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2115 spin_lock_irq(&rme96->lock);
2116 change = val != rme96->wcreg_spdif;
2117 rme96->wcreg_spdif = val;
2118 spin_unlock_irq(&rme96->lock);
2131 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2133 snd_rme96_convert_to_aes(&ucontrol->value.iec958, rme96->wcreg_spdif_stream);
2139 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2144 spin_lock_irq(&rme96->lock);
2145 change = val != rme96->wcreg_spdif_stream;
2146 rme96->wcreg_spdif_stream = val;
2147 rme96->wcreg &= ~(RME96_WCR_PRO | RME96_WCR_DOLBY | RME96_WCR_EMP);
2148 rme96->wcreg |= val;
2149 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
2150 spin_unlock_irq(&rme96->lock);
2170 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2175 uinfo->value.integer.max = RME96_185X_MAX_OUT(rme96);
2182 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2184 spin_lock_irq(&rme96->lock);
2185 u->value.integer.value[0] = rme96->vol[0];
2186 u->value.integer.value[1] = rme96->vol[1];
2187 spin_unlock_irq(&rme96->lock);
2195 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2200 if (!RME96_HAS_ANALOG_OUT(rme96))
2202 maxvol = RME96_185X_MAX_OUT(rme96);
2203 spin_lock_irq(&rme96->lock);
2205 if (vol != rme96->vol[0] && vol <= maxvol) {
2206 rme96->vol[0] = vol;
2210 if (vol != rme96->vol[1] && vol <= maxvol) {
2211 rme96->vol[1] = vol;
2215 snd_rme96_apply_dac_volume(rme96);
2216 spin_unlock_irq(&rme96->lock);
2303 struct rme96 *rme96)
2309 kctl = snd_ctl_new1(&snd_rme96_controls[idx], rme96);
2314 rme96->spdif_ctl = kctl;
2317 if (RME96_HAS_ANALOG_OUT(rme96)) {
2319 err = snd_ctl_add(card, snd_ctl_new1(&snd_rme96_controls[idx], rme96));
2337 struct rme96 *rme96 = card->private_data;
2342 rme96->playback_pointer = readl(rme96->iobase + RME96_IO_GET_PLAY_POS)
2344 rme96->capture_pointer = readl(rme96->iobase + RME96_IO_GET_REC_POS)
2348 memcpy_fromio(rme96->playback_suspend_buffer,
2349 rme96->iobase + RME96_IO_PLAY_BUFFER, RME96_BUFFER_SIZE);
2350 memcpy_fromio(rme96->capture_suspend_buffer,
2351 rme96->iobase + RME96_IO_REC_BUFFER, RME96_BUFFER_SIZE);
2354 rme96->areg &= ~RME96_AR_DAC_EN;
2355 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
2362 struct rme96 *rme96 = card->private_data;
2365 writel(0, rme96->iobase + RME96_IO_SET_PLAY_POS
2366 + rme96->playback_pointer);
2367 writel(0, rme96->iobase + RME96_IO_SET_REC_POS
2368 + rme96->capture_pointer);
2371 memcpy_toio(rme96->iobase + RME96_IO_PLAY_BUFFER,
2372 rme96->playback_suspend_buffer, RME96_BUFFER_SIZE);
2373 memcpy_toio(rme96->iobase + RME96_IO_REC_BUFFER,
2374 rme96->capture_suspend_buffer, RME96_BUFFER_SIZE);
2377 writel(rme96->areg | RME96_AR_PD2,
2378 rme96->iobase + RME96_IO_ADDITIONAL_REG);
2379 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
2382 snd_rme96_reset_dac(rme96);
2383 rme96->areg |= RME96_AR_DAC_EN;
2384 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
2385 if (RME96_HAS_ANALOG_OUT(rme96)) {
2387 snd_rme96_apply_dac_volume(rme96);
2411 struct rme96 *rme96;
2424 sizeof(*rme96), &card);
2428 rme96 = card->private_data;
2429 rme96->card = card;
2430 rme96->pci = pci;
2431 err = snd_rme96_create(rme96);
2436 rme96->playback_suspend_buffer = vmalloc(RME96_BUFFER_SIZE);
2437 if (!rme96->playback_suspend_buffer)
2439 rme96->capture_suspend_buffer = vmalloc(RME96_BUFFER_SIZE);
2440 if (!rme96->capture_suspend_buffer)
2445 switch (rme96->pci->device) {
2456 pci_read_config_byte(rme96->pci, 8, &val);
2465 rme96->port, rme96->irq);