Lines Matching defs:iobase
212 void __iomem *iobase;
298 return (readl(rme96->iobase + RME96_IO_GET_PLAY_POS)
305 return (readl(rme96->iobase + RME96_IO_GET_REC_POS)
315 memset_io(rme96->iobase + RME96_IO_PLAY_BUFFER + pos,
327 return copy_from_iter_toio(rme96->iobase + RME96_IO_PLAY_BUFFER + pos,
339 rme96->iobase + RME96_IO_REC_BUFFER + pos,
483 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
486 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
492 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
495 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
514 rme96->iobase + RME96_IO_CONTROL_REGISTER);
515 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
539 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
574 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
605 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
721 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
764 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
791 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
792 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
842 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
861 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
863 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
912 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
929 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
949 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
961 runtime->dma_area = (void __force *)(rme96->iobase +
1002 writel(rme96->wcreg |= rme96->wcreg_spdif_stream, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1024 runtime->dma_area = (void __force *)(rme96->iobase +
1077 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
1079 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
1081 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1083 writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ);
1086 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1088 writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ);
1098 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1109 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1120 writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ);
1125 writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ);
1173 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1243 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1345 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
1359 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
1544 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1584 rme96->iobase = devm_ioremap(&pci->dev, rme96->port, RME96_IO_SIZE);
1585 if (!rme96->iobase) {
1650 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1651 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1655 rme96->iobase + RME96_IO_ADDITIONAL_REG);
1656 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1661 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1664 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
1665 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
1694 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1850 writel(val, rme96->iobase + RME96_IO_CONTROL_REGISTER);
2149 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
2342 rme96->playback_pointer = readl(rme96->iobase + RME96_IO_GET_PLAY_POS)
2344 rme96->capture_pointer = readl(rme96->iobase + RME96_IO_GET_REC_POS)
2349 rme96->iobase + RME96_IO_PLAY_BUFFER, RME96_BUFFER_SIZE);
2351 rme96->iobase + RME96_IO_REC_BUFFER, RME96_BUFFER_SIZE);
2355 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
2365 writel(0, rme96->iobase + RME96_IO_SET_PLAY_POS
2367 writel(0, rme96->iobase + RME96_IO_SET_REC_POS
2371 memcpy_toio(rme96->iobase + RME96_IO_PLAY_BUFFER,
2373 memcpy_toio(rme96->iobase + RME96_IO_REC_BUFFER,
2378 rme96->iobase + RME96_IO_ADDITIONAL_REG);
2379 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
2384 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);