Lines Matching refs:rmh
238 struct pcxhr_rmh rmh;
266 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);
267 rmh.cmd[0] |= IO_NUM_REG_GENCLK;
268 rmh.cmd[1] = pllreg & MASK_DSP_WORD;
269 rmh.cmd[2] = pllreg >> 24;
270 rmh.cmd_len = 3;
271 err = pcxhr_send_msg(mgr, &rmh);
312 struct pcxhr_rmh rmh;
327 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* mute outputs */
328 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
330 rmh.cmd[1] = 1;
331 rmh.cmd_len = 2;
333 err = pcxhr_send_msg(mgr, &rmh);
337 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* set speed ratio */
338 rmh.cmd[0] |= IO_NUM_SPEED_RATIO;
339 rmh.cmd[1] = speed;
340 rmh.cmd_len = 2;
341 err = pcxhr_send_msg(mgr, &rmh);
357 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); /* unmute outputs */
358 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
360 rmh.cmd[1] = 1;
361 rmh.cmd_len = 2;
363 err = pcxhr_send_msg(mgr, &rmh);
381 struct pcxhr_rmh rmh;
396 pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK);
397 rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT; /* resync fifos */
399 rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD;
401 rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD * 2;
402 rmh.cmd[2] = rate;
403 rmh.cmd_len = 3;
404 err = pcxhr_send_msg(mgr, &rmh);
416 struct pcxhr_rmh rmh;
442 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);
443 rmh.cmd_len = 2;
444 rmh.cmd[0] |= IO_NUM_REG_STATUS;
446 rmh.cmd[1] = reg;
447 err = pcxhr_send_msg(mgr, &rmh);
453 rmh.cmd[1] = REG_STATUS_CURRENT;
454 err = pcxhr_send_msg(mgr, &rmh);
457 switch (rmh.stat[1] & 0x0f) {
494 struct pcxhr_rmh rmh;
518 pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM);
519 pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture,
524 err = pcxhr_send_msg(chip->mgr, &rmh);
546 struct pcxhr_rmh rmh;
590 pcxhr_init_rmh(&rmh, is_capture ?
592 pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio,
598 rmh.cmd[0] |= 1<<10;
600 rmh.cmd[0] |= 1<<12;
602 rmh.cmd[1] = 0;
603 rmh.cmd_len = 2;
606 rmh.cmd[1] = stream->channels;
609 rmh.cmd[2] = (stream->channels == 1) ? 0x01 : 0x03;
610 rmh.cmd_len = 3;
613 rmh.cmd[rmh.cmd_len++] = header >> 8;
614 rmh.cmd[rmh.cmd_len++] = (header & 0xff) << 16;
615 err = pcxhr_send_msg(chip->mgr, &rmh);
625 struct pcxhr_rmh rmh;
638 pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS);
639 pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio,
645 rmh.cmd[1] = subs->runtime->dma_bytes * 8;
647 rmh.cmd[2] = subs->runtime->dma_addr >> 24;
649 rmh.cmd[2] |= 1<<19;
651 rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD;
652 rmh.cmd_len = 4;
653 err = pcxhr_send_msg(chip->mgr, &rmh);
665 struct pcxhr_rmh rmh;
668 pcxhr_init_rmh(&rmh, CMD_PIPE_SAMPLE_COUNT);
669 pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, 0, 0,
671 err = pcxhr_send_msg(chip->mgr, &rmh);
673 *sample_count = ((snd_pcm_uframes_t)rmh.stat[0]) << 24;
674 *sample_count += (snd_pcm_uframes_t)rmh.stat[1];
880 struct pcxhr_rmh rmh;
883 pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT);
887 rmh.cmd[0] |= mgr->granularity;
889 err = pcxhr_send_msg(mgr, &rmh);
1227 struct pcxhr_rmh rmh;
1241 pcxhr_init_rmh(&rmh, CMD_GET_DSP_RESOURCES);
1242 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1243 int cur = rmh.stat[0];
1244 int ref = rmh.stat[1];
1257 rmh.stat[2], rmh.stat[3]);
1271 rmh.cmd[0] = 0x4200 + PCXHR_SIZE_MAX_STATUS;
1272 rmh.cmd_len = 1;
1273 rmh.stat_len = PCXHR_SIZE_MAX_STATUS;
1274 rmh.dsp_stat = 0;
1275 rmh.cmd_idx = CMD_LAST_INDEX;
1276 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1278 if (rmh.stat_len > 8)
1279 rmh.stat_len = 8;
1280 for (i = 0; i < rmh.stat_len; i++)
1282 i, rmh.stat[i]);
1380 struct pcxhr_rmh rmh;
1389 pcxhr_init_rmh(&rmh, CMD_MANAGE_SIGNAL);
1390 rmh.cmd[0] |= MANAGE_SIGNAL_TIME_CODE;
1391 err = pcxhr_send_msg(mgr, &rmh);
1403 pcxhr_init_rmh(&rmh, CMD_GET_TIME_CODE);
1404 err = pcxhr_send_msg(mgr, &rmh);
1409 ltcHrs = 10*((rmh.stat[0] >> 8) & 0x3) + (rmh.stat[0] & 0xf);
1410 ltcMin = 10*((rmh.stat[1] >> 16) & 0x7) + ((rmh.stat[1] >> 8) & 0xf);
1411 ltcSec = 10*(rmh.stat[1] & 0x7) + ((rmh.stat[2] >> 16) & 0xf);
1412 ltcFrm = 10*((rmh.stat[2] >> 8) & 0x3) + (rmh.stat[2] & 0xf);
1416 snd_iprintf(buffer, "raw: 0x%04x%06x%06x\n", rmh.stat[0] & 0x00ffff,
1417 rmh.stat[1] & 0xffffff, rmh.stat[2] & 0xffffff);
1419 rmh.stat[3] & 0xffffff, rmh.stat[4] & 0xffffff);*/
1420 if (!(rmh.stat[0] & TIME_CODE_VALID_MASK)) {