Lines Matching defs:mgr
28 * @mgr: pointer to miXart manager structure
34 static int mixart_wait_nice_for_register_value(struct mixart_mgr *mgr,
46 read = readl_be( MIXART_MEM( mgr, offset ));
90 static int mixart_load_elf(struct mixart_mgr *mgr, const struct firmware *dsp )
111 memcpy_toio( MIXART_MEM( mgr, be32_to_cpu(elf_programheader.p_vaddr)),
129 static int mixart_enum_connectors(struct mixart_mgr *mgr)
155 err = snd_mixart_send_msg(mgr, &request, sizeof(*connector), connector);
157 dev_err(&mgr->pci->dev,
167 pipe = &mgr->chip[k/2]->pipe_out_ana;
169 pipe = &mgr->chip[(k-MIXART_FIRST_DIG_AUDIO_ID)/2]->pipe_out_dig;
177 /* dev_dbg(&mgr->pci->dev, "playback connector[%d].object_id = %x\n", k, connector->uid[k].object_id); */
185 err = snd_mixart_send_msg(mgr, &request, sizeof(*audio_info), audio_info);
187 dev_err(&mgr->pci->dev,
191 /*dev_dbg(&mgr->pci->dev, "play analog_info.analog_level_present = %x\n", audio_info->info.analog_info.analog_level_present);*/
199 err = snd_mixart_send_msg(mgr, &request, sizeof(*connector), connector);
201 dev_err(&mgr->pci->dev,
211 pipe = &mgr->chip[k/2]->pipe_in_ana;
213 pipe = &mgr->chip[(k-MIXART_FIRST_DIG_AUDIO_ID)/2]->pipe_in_dig;
221 /* dev_dbg(&mgr->pci->dev, "capture connector[%d].object_id = %x\n", k, connector->uid[k].object_id); */
229 err = snd_mixart_send_msg(mgr, &request, sizeof(*audio_info), audio_info);
231 dev_err(&mgr->pci->dev,
235 /*dev_dbg(&mgr->pci->dev, "rec analog_info.analog_level_present = %x\n", audio_info->info.analog_info.analog_level_present);*/
247 static int mixart_enum_physio(struct mixart_mgr *mgr)
265 err = snd_mixart_send_msg(mgr, &request, sizeof(console_mgr), &console_mgr);
268 dev_dbg(&mgr->pci->dev,
275 mgr->uid_console_manager = console_mgr.uid;
282 err = snd_mixart_send_msg(mgr, &request, sizeof(phys_io), &phys_io);
284 dev_err(&mgr->pci->dev,
294 for(k=0; k<mgr->num_cards; k++) {
295 mgr->chip[k]->uid_in_analog_physio = phys_io.uid[k];
296 mgr->chip[k]->uid_out_analog_physio = phys_io.uid[phys_io.nb_uid/2 + k];
303 static int mixart_first_init(struct mixart_mgr *mgr)
309 err = mixart_enum_connectors(mgr);
313 err = mixart_enum_physio(mgr);
324 err = snd_mixart_send_msg(mgr, &request, sizeof(k), &k);
326 dev_err(&mgr->pci->dev, "error MSG_SYSTEM_SEND_SYNCHRO_CMD\n");
337 static int mixart_dsp_load(struct mixart_mgr* mgr, int index, const struct firmware *dsp)
344 status_xilinx = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_MXLX_STATUS_OFFSET ));
346 status_elf = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_ELF_STATUS_OFFSET ));
348 status_daught = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_DXLX_STATUS_OFFSET ));
352 dev_err(&mgr->pci->dev, "miXart is resetting !\n");
361 dev_dbg(&mgr->pci->dev, "xilinx is already loaded !\n");
366 dev_err(&mgr->pci->dev,
379 writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET ));
382 writel_be( MIXART_MOTHERBOARD_XLX_BASE_ADDRESS, MIXART_MEM( mgr,MIXART_PSEUDOREG_MXLX_BASE_ADDR_OFFSET ));
384 writel_be( dsp->size, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_SIZE_OFFSET ));
387 memcpy_toio( MIXART_MEM( mgr, MIXART_MOTHERBOARD_XLX_BASE_ADDRESS), dsp->data, dsp->size);
390 writel_be( 2, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET ));
398 dev_dbg(&mgr->pci->dev, "elf file already loaded !\n");
404 dev_err(&mgr->pci->dev,
411 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET, 1, 4, 500); /* 5sec */
413 dev_err(&mgr->pci->dev, "xilinx was not loaded or "
419 writel_be( 0, MIXART_MEM( mgr, MIXART_PSEUDOREG_BOARDNUMBER ) ); /* set miXart boardnumber to 0 */
420 writel_be( 0, MIXART_MEM( mgr, MIXART_FLOWTABLE_PTR ) ); /* reset pointer to flow table on miXart */
423 writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET ));
426 err = mixart_load_elf( mgr, dsp );
430 writel_be( 2, MIXART_MEM( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET ));
433 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET, 1, 4, 300); /* 3sec */
435 dev_err(&mgr->pci->dev, "elf could not be started\n");
440 writel_be( (u32)mgr->flowinfo.addr, MIXART_MEM( mgr, MIXART_FLOWTABLE_PTR ) ); /* give pointer of flow table to miXart */
449 dev_err(&mgr->pci->dev, "xilinx or elf not "
455 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DBRD_PRESENCE_OFFSET, 0, 0, 30); /* 300msec */
457 dev_err(&mgr->pci->dev, "error starting elf file\n");
462 mgr->board_type = (DAUGHTER_TYPE_MASK & readl_be( MIXART_MEM( mgr, MIXART_PSEUDOREG_DBRD_TYPE_OFFSET)));
464 if (mgr->board_type == MIXART_DAUGHTER_TYPE_NONE)
468 if (mgr->board_type != MIXART_DAUGHTER_TYPE_AES )
473 dev_err(&mgr->pci->dev,
486 writel_be( dsp->size, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_SIZE_OFFSET ));
489 writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET ));
492 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET, 1, 2, 30); /* 300msec */
494 dev_err(&mgr->pci->dev, "daughter board load error\n");
499 val = readl_be( MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_BASE_ADDR_OFFSET ));
504 memcpy_toio( MIXART_MEM( mgr, val), dsp->data, dsp->size);
507 writel_be( 4, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET ));
514 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET, 1, 3, 300); /* 3sec */
516 dev_err(&mgr->pci->dev,
522 snd_mixart_init_mailbox(mgr);
525 err = mixart_first_init(mgr);
527 dev_err(&mgr->pci->dev, "miXart could not be set up\n");
532 for (card_index = 0; card_index < mgr->num_cards; card_index++) {
533 struct snd_mixart *chip = mgr->chip[card_index];
540 err = snd_mixart_create_mixer(chip->mgr);
550 dev_dbg(&mgr->pci->dev,
557 int snd_mixart_setup_firmware(struct mixart_mgr *mgr)
569 if (request_firmware(&fw_entry, path, &mgr->pci->dev)) {
570 dev_err(&mgr->pci->dev,
575 err = mixart_dsp_load(mgr, i, fw_entry);
579 mgr->dsp_loaded |= 1 << i;