Lines Matching defs:iobase
723 unsigned long iobase;
912 outw(value, chip->iobase + reg);
917 return inw(chip->iobase + reg);
922 outb(value, chip->iobase + reg);
927 return inb(chip->iobase + reg);
1527 x = inb(chip->iobase + SHADOW_MIX_REG_VOICE) & 0xee;
1538 outb(0x88, chip->iobase + SHADOW_MIX_REG_VOICE);
1539 outb(0x88, chip->iobase + HW_VOL_COUNTER_VOICE);
1540 outb(0x88, chip->iobase + SHADOW_MIX_REG_MASTER);
1541 outb(0x88, chip->iobase + HW_VOL_COUNTER_MASTER);
1615 status = inb(chip->iobase + HOST_INT_STATUS);
1628 u8 ctl = inb(chip->iobase + ASSP_CONTROL_B);
1630 ctl = inb(chip->iobase + ASSP_HOST_INT_STATUS);
1632 outb(DSP2HOST_REQ_TIMER, chip->iobase + ASSP_HOST_INT_STATUS);
1651 outb(status, chip->iobase + HOST_INT_STATUS);
1923 int io = chip->iobase;
1964 int io = chip->iobase;
2214 int io = chip->iobase;
2238 unsigned long io = chip->iobase;
2262 unsigned long io = chip->iobase;
2281 outb(RESET_ASSP, chip->iobase + ASSP_CONTROL_B);
2297 t = inb(chip->iobase + ASSP_CONTROL_A);
2301 outb(t, chip->iobase + ASSP_CONTROL_A);
2304 outb(RUN_ASSP, chip->iobase + ASSP_CONTROL_B);
2318 unsigned long io = chip->iobase;
2325 outb(val, chip->iobase + HOST_INT_STATUS);
2353 if (chip->iobase) {
2354 outw(0, chip->iobase + HOST_INT_CTRL); /* disable ints */
2568 chip->iobase = pci_resource_start(pci, 0);
2677 card->shortname, chip->iobase, chip->irq);
2686 chip->iobase + MPU401_DATA_PORT,