Lines Matching refs:codec
1135 struct hda_codec *codec;
1513 * CA0132 codec access
1515 static unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid,
1519 response = snd_hda_codec_read(codec, nid, 0, verb, parm);
1525 static int codec_set_converter_format(struct hda_codec *codec, hda_nid_t nid,
1528 return codec_send_command(codec, nid, VENDOR_CHIPIO_STREAM_FORMAT,
1532 static int codec_set_converter_stream_channel(struct hda_codec *codec,
1539 return codec_send_command(codec, nid, AC_VERB_SET_CHANNEL_STREAMID,
1544 static int chipio_send(struct hda_codec *codec,
1553 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
1566 static int chipio_write_address(struct hda_codec *codec,
1569 struct ca0132_spec *spec = codec->spec;
1576 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW,
1581 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH,
1593 static int chipio_write_data(struct hda_codec *codec, unsigned int data)
1595 struct ca0132_spec *spec = codec->spec;
1599 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff);
1603 res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH,
1617 static int chipio_write_data_multiple(struct hda_codec *codec,
1624 codec_dbg(codec, "chipio_write_data null ptr\n");
1629 status = chipio_write_data(codec, *data++);
1638 static int chipio_read_data(struct hda_codec *codec, unsigned int *data)
1640 struct ca0132_spec *spec = codec->spec;
1644 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0);
1648 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
1653 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
1669 static int chipio_write(struct hda_codec *codec,
1672 struct ca0132_spec *spec = codec->spec;
1678 err = chipio_write_address(codec, chip_addx);
1682 err = chipio_write_data(codec, data);
1695 static int chipio_write_no_mutex(struct hda_codec *codec,
1702 err = chipio_write_address(codec, chip_addx);
1706 err = chipio_write_data(codec, data);
1718 static int chipio_write_multiple(struct hda_codec *codec,
1723 struct ca0132_spec *spec = codec->spec;
1727 status = chipio_write_address(codec, chip_addx);
1731 status = chipio_write_data_multiple(codec, data, count);
1742 static int chipio_read(struct hda_codec *codec,
1745 struct ca0132_spec *spec = codec->spec;
1751 err = chipio_write_address(codec, chip_addx);
1755 err = chipio_read_data(codec, data);
1767 static void chipio_set_control_flag(struct hda_codec *codec,
1776 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1783 static void chipio_set_control_param(struct hda_codec *codec,
1786 struct ca0132_spec *spec = codec->spec;
1791 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1795 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) {
1796 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1799 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1810 static void chipio_set_control_param_no_mutex(struct hda_codec *codec,
1817 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1820 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) {
1821 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1824 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1834 static void chipio_set_stream_source_dest(struct hda_codec *codec,
1837 chipio_set_control_param_no_mutex(codec,
1839 chipio_set_control_param_no_mutex(codec,
1841 chipio_set_control_param_no_mutex(codec,
1848 static void chipio_set_stream_channels(struct hda_codec *codec,
1851 chipio_set_control_param_no_mutex(codec,
1853 chipio_set_control_param_no_mutex(codec,
1860 static void chipio_set_stream_control(struct hda_codec *codec,
1863 chipio_set_control_param_no_mutex(codec,
1865 chipio_set_control_param_no_mutex(codec,
1872 static void chipio_get_stream_control(struct hda_codec *codec,
1875 chipio_set_control_param_no_mutex(codec,
1877 *enable = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
1885 static void chipio_set_conn_rate_no_mutex(struct hda_codec *codec,
1888 chipio_set_control_param_no_mutex(codec,
1890 chipio_set_control_param_no_mutex(codec,
1897 static void chipio_set_conn_rate(struct hda_codec *codec,
1900 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_ID, connid);
1901 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_SAMPLE_RATE,
1910 static void chipio_8051_write_direct(struct hda_codec *codec,
1916 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, verb, addr);
1927 static void chipio_8051_set_address(struct hda_codec *codec, unsigned int addr)
1933 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1938 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1942 static void chipio_8051_set_data(struct hda_codec *codec, unsigned int data)
1945 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1949 static unsigned int chipio_8051_get_data(struct hda_codec *codec)
1951 return snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
1956 static void chipio_8051_set_data_pll(struct hda_codec *codec, unsigned int data)
1959 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1963 static void chipio_8051_write_exram(struct hda_codec *codec,
1966 struct ca0132_spec *spec = codec->spec;
1970 chipio_8051_set_address(codec, addr);
1971 chipio_8051_set_data(codec, data);
1976 static void chipio_8051_write_exram_no_mutex(struct hda_codec *codec,
1979 chipio_8051_set_address(codec, addr);
1980 chipio_8051_set_data(codec, data);
1984 static void chipio_8051_read_exram(struct hda_codec *codec,
1987 chipio_8051_set_address(codec, addr);
1988 *data = chipio_8051_get_data(codec);
1991 static void chipio_8051_write_pll_pmu(struct hda_codec *codec,
1994 struct ca0132_spec *spec = codec->spec;
1998 chipio_8051_set_address(codec, addr & 0xff);
1999 chipio_8051_set_data_pll(codec, data);
2004 static void chipio_8051_write_pll_pmu_no_mutex(struct hda_codec *codec,
2007 chipio_8051_set_address(codec, addr & 0xff);
2008 chipio_8051_set_data_pll(codec, data);
2014 static void chipio_enable_clocks(struct hda_codec *codec)
2016 struct ca0132_spec *spec = codec->spec;
2020 chipio_8051_write_pll_pmu_no_mutex(codec, 0x00, 0xff);
2021 chipio_8051_write_pll_pmu_no_mutex(codec, 0x05, 0x0b);
2022 chipio_8051_write_pll_pmu_no_mutex(codec, 0x06, 0xff);
2030 static int dspio_send(struct hda_codec *codec, unsigned int reg,
2038 res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data);
2050 static void dspio_write_wait(struct hda_codec *codec)
2056 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,
2068 static int dspio_write(struct hda_codec *codec, unsigned int scp_data)
2070 struct ca0132_spec *spec = codec->spec;
2073 dspio_write_wait(codec);
2076 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_LOW,
2081 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_HIGH,
2087 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,
2099 static int dspio_write_multiple(struct hda_codec *codec,
2110 status = dspio_write(codec, *buffer++);
2119 static int dspio_read(struct hda_codec *codec, unsigned int *data)
2123 status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0);
2127 status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0);
2132 *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,
2138 static int dspio_read_multiple(struct hda_codec *codec, unsigned int *buffer,
2152 status = dspio_read(codec, buffer++);
2161 status = dspio_read(codec, &dummy);
2231 static void dspio_clear_response_queue(struct hda_codec *codec)
2239 status = dspio_read(codec, &dummy);
2243 static int dspio_get_response_data(struct hda_codec *codec)
2245 struct ca0132_spec *spec = codec->spec;
2249 if (dspio_read(codec, &data) < 0)
2256 dspio_read_multiple(codec, spec->scp_resp_data,
2267 static int dspio_send_scp_message(struct hda_codec *codec,
2274 struct ca0132_spec *spec = codec->spec;
2313 status = dspio_write_multiple(codec, (unsigned int *)send_buf,
2345 * @codec: the HDA codec
2357 static int dspio_scp(struct hda_codec *codec,
2374 codec_dbg(codec, "dspio_scp get but has no buffer\n");
2379 codec_dbg(codec, "dspio_scp bad resp buf len parms\n");
2392 status = dspio_send_scp_message(codec, (unsigned char *)&scp_send,
2397 codec_dbg(codec, "dspio_scp: send scp msg failed\n");
2416 codec_dbg(codec, "reply too long for buf\n");
2419 codec_dbg(codec, "RetLen and HdrLen .NE.\n");
2422 codec_dbg(codec, "NULL reply\n");
2429 codec_dbg(codec, "reply ill-formed or errflag set\n");
2439 static int dspio_set_param(struct hda_codec *codec, int mod_id,
2442 return dspio_scp(codec, mod_id, src_id, req, SCP_SET, data, len, NULL,
2446 static int dspio_set_uint_param(struct hda_codec *codec, int mod_id,
2449 return dspio_set_param(codec, mod_id, 0x20, req, &data,
2456 static int dspio_alloc_dma_chan(struct hda_codec *codec, unsigned int *dma_chan)
2461 codec_dbg(codec, " dspio_alloc_dma_chan() -- begin\n");
2462 status = dspio_scp(codec, MASTERCONTROL, 0x20,
2467 codec_dbg(codec, "dspio_alloc_dma_chan: SCP Failed\n");
2472 codec_dbg(codec, "no free dma channels to allocate\n");
2476 codec_dbg(codec, "dspio_alloc_dma_chan: chan=%d\n", *dma_chan);
2477 codec_dbg(codec, " dspio_alloc_dma_chan() -- complete\n");
2485 static int dspio_free_dma_chan(struct hda_codec *codec, unsigned int dma_chan)
2490 codec_dbg(codec, " dspio_free_dma_chan() -- begin\n");
2491 codec_dbg(codec, "dspio_free_dma_chan: chan=%d\n", dma_chan);
2493 status = dspio_scp(codec, MASTERCONTROL, 0x20,
2498 codec_dbg(codec, "dspio_free_dma_chan: SCP Failed\n");
2502 codec_dbg(codec, " dspio_free_dma_chan() -- complete\n");
2510 static int dsp_set_run_state(struct hda_codec *codec)
2516 err = chipio_read(codec, DSP_DBGCNTL_INST_OFFSET, &dbg_ctrl_reg);
2526 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET,
2533 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET,
2545 static int dsp_reset(struct hda_codec *codec)
2550 codec_dbg(codec, "dsp_reset\n");
2552 res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0);
2557 codec_dbg(codec, "dsp_reset timeout\n");
2588 static bool dsp_is_dma_active(struct hda_codec *codec, unsigned int dma_chan)
2592 chipio_read(codec, DSPDMAC_CHNLSTART_INST_OFFSET, &dma_chnlstart_reg);
2598 static int dsp_dma_setup_common(struct hda_codec *codec,
2610 codec_dbg(codec, "-- dsp_dma_setup_common() -- Begin ---------\n");
2613 codec_dbg(codec, "dma chan num invalid\n");
2617 if (dsp_is_dma_active(codec, dma_chan)) {
2618 codec_dbg(codec, "dma already active\n");
2625 codec_dbg(codec, "invalid chip addr\n");
2632 codec_dbg(codec, " dsp_dma_setup_common() start reg pgm\n");
2635 status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET,
2639 codec_dbg(codec, "read CHNLPROP Reg fail\n");
2642 codec_dbg(codec, "dsp_dma_setup_common() Read CHNLPROP\n");
2652 status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop);
2654 codec_dbg(codec, "write CHNLPROP Reg fail\n");
2657 codec_dbg(codec, " dsp_dma_setup_common() Write CHNLPROP\n");
2660 status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET,
2664 codec_dbg(codec, "read ACTIVE Reg fail\n");
2667 codec_dbg(codec, "dsp_dma_setup_common() Read ACTIVE\n");
2673 status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active);
2675 codec_dbg(codec, "write ACTIVE Reg fail\n");
2679 codec_dbg(codec, " dsp_dma_setup_common() Write ACTIVE\n");
2681 status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan),
2684 codec_dbg(codec, "write AUDCHSEL Reg fail\n");
2687 codec_dbg(codec, " dsp_dma_setup_common() Write AUDCHSEL\n");
2689 status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan),
2692 codec_dbg(codec, "write IRQCNT Reg fail\n");
2695 codec_dbg(codec, " dsp_dma_setup_common() Write IRQCNT\n");
2697 codec_dbg(codec,
2703 codec_dbg(codec, "-- dsp_dma_setup_common() -- Complete ------\n");
2711 static int dsp_dma_setup(struct hda_codec *codec,
2729 codec_dbg(codec, "-- dsp_dma_setup() -- Begin ---------\n");
2732 codec_dbg(codec, "count too big\n");
2738 codec_dbg(codec, "invalid chip addr\n");
2742 codec_dbg(codec, " dsp_dma_setup() start reg pgm\n");
2756 status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan),
2759 codec_dbg(codec, "write DMACFG Reg fail\n");
2762 codec_dbg(codec, " dsp_dma_setup() Write DMACFG\n");
2767 status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan),
2770 codec_dbg(codec, "write DSPADROFS Reg fail\n");
2773 codec_dbg(codec, " dsp_dma_setup() Write DSPADROFS\n");
2781 status = chipio_write(codec,
2784 codec_dbg(codec, "write XFRCNT Reg fail\n");
2787 codec_dbg(codec, " dsp_dma_setup() Write XFRCNT\n");
2789 codec_dbg(codec,
2794 codec_dbg(codec, "-- dsp_dma_setup() -- Complete ---------\n");
2802 static int dsp_dma_start(struct hda_codec *codec,
2808 codec_dbg(codec, "-- dsp_dma_start() -- Begin ---------\n");
2811 status = chipio_read(codec,
2815 codec_dbg(codec, "read CHNLSTART reg fail\n");
2818 codec_dbg(codec, "-- dsp_dma_start() Read CHNLSTART\n");
2824 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET,
2827 codec_dbg(codec, "write CHNLSTART reg fail\n");
2830 codec_dbg(codec, "-- dsp_dma_start() -- Complete ---------\n");
2838 static int dsp_dma_stop(struct hda_codec *codec,
2844 codec_dbg(codec, "-- dsp_dma_stop() -- Begin ---------\n");
2847 status = chipio_read(codec,
2851 codec_dbg(codec, "read CHNLSTART reg fail\n");
2854 codec_dbg(codec, "-- dsp_dma_stop() Read CHNLSTART\n");
2859 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET,
2862 codec_dbg(codec, "write CHNLSTART reg fail\n");
2865 codec_dbg(codec, "-- dsp_dma_stop() -- Complete ---------\n");
2873 * @codec: the HDA codec
2881 static int dsp_allocate_router_ports(struct hda_codec *codec,
2891 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
2899 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
2903 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
2907 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
2911 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
2922 static int dsp_free_router_ports(struct hda_codec *codec)
2926 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
2930 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
2934 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
2942 static int dsp_allocate_ports(struct hda_codec *codec,
2948 codec_dbg(codec, " dsp_allocate_ports() -- begin\n");
2951 codec_dbg(codec, "bad rate multiple\n");
2955 status = dsp_allocate_router_ports(codec, num_chans,
2958 codec_dbg(codec, " dsp_allocate_ports() -- complete\n");
2963 static int dsp_allocate_ports_format(struct hda_codec *codec,
2974 codec_dbg(codec, "bad rate multiple\n");
2980 return dsp_allocate_ports(codec, num_chans, rate_multi, port_map);
2986 static int dsp_free_ports(struct hda_codec *codec)
2990 codec_dbg(codec, " dsp_free_ports() -- begin\n");
2992 status = dsp_free_router_ports(codec);
2994 codec_dbg(codec, "free router ports fail\n");
2997 codec_dbg(codec, " dsp_free_ports() -- complete\n");
3006 struct hda_codec *codec;
3018 static int dma_convert_to_hda_format(struct hda_codec *codec,
3039 struct hda_codec *codec = dma->codec;
3040 struct ca0132_spec *spec = codec->spec;
3044 snd_hda_codec_load_dsp_cleanup(codec, dma->dmab);
3046 status = snd_hda_codec_load_dsp_prepare(codec,
3071 snd_hda_codec_load_dsp_trigger(dma->codec, cmd);
3103 struct ca0132_spec *spec = dma->codec->spec;
3154 static int dspxfr_hci_write(struct hda_codec *codec,
3162 codec_dbg(codec, "hci_write invalid params\n");
3169 status = chipio_write(codec, data[0], data[1]);
3171 codec_dbg(codec, "hci_write chipio failed\n");
3183 * @codec: the HDA codec
3194 static int dspxfr_one_seg(struct hda_codec *codec,
3230 codec_dbg(codec, "hci_write\n");
3231 return dspxfr_hci_write(codec, hci_write);
3235 codec_dbg(codec, "Invalid Params\n");
3244 return hci_write ? dspxfr_hci_write(codec, hci_write) : 0;
3251 codec_dbg(codec, "Invalid chip_addx Params\n");
3261 codec_dbg(codec, "dma_engine buffer NULL\n");
3274 codec_dbg(codec, "frmsz zero\n");
3282 codec_dbg(codec,
3289 codec_dbg(codec, "dspxfr_one_seg:failed\n");
3303 codec_dbg(codec, "dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n",
3307 status = dsp_dma_stop(codec, dma_chan, ovly);
3310 status = dsp_dma_setup_common(codec, chip_addx,
3317 status = dsp_dma_setup(codec, chip_addx,
3321 status = dsp_dma_start(codec, dma_chan, ovly);
3324 if (!dsp_is_dma_active(codec, dma_chan)) {
3325 codec_dbg(codec, "dspxfr:DMA did not start\n");
3332 status = chipio_write_multiple(codec,
3341 status = dspxfr_hci_write(codec, hci_write);
3349 dma_active = dsp_is_dma_active(codec, dma_chan);
3357 codec_dbg(codec, "+++++ DMA complete\n");
3370 status = chipio_write_multiple(codec, chip_addx_remainder,
3380 * @codec: the HDA codec
3390 static int dspxfr_image(struct hda_codec *codec,
3397 struct ca0132_spec *spec = codec->spec;
3419 dma_engine->codec = codec;
3420 dma_convert_to_hda_format(codec, sample_rate, channels, &hda_format);
3427 status = codec_set_converter_format(codec, WIDGET_CHIP_CTRL,
3431 codec_dbg(codec, "set converter format fail\n");
3435 status = snd_hda_codec_load_dsp_prepare(codec,
3444 status = dspio_alloc_dma_chan(codec, &dma_chan);
3446 codec_dbg(codec, "alloc dmachan fail\n");
3453 status = dsp_allocate_ports_format(codec, hda_format,
3456 codec_dbg(codec, "alloc ports fail\n");
3461 status = codec_set_converter_stream_channel(codec,
3464 codec_dbg(codec, "set stream chan fail\n");
3470 codec_dbg(codec, "FLS check fail\n");
3474 status = dspxfr_one_seg(codec, fls_data, reloc,
3488 status = dsp_free_ports(codec);
3493 status = codec_set_converter_stream_channel(codec,
3498 dspio_free_dma_chan(codec, dma_chan);
3501 snd_hda_codec_load_dsp_cleanup(codec, dma_engine->dmab);
3511 static void dspload_post_setup(struct hda_codec *codec)
3513 struct ca0132_spec *spec = codec->spec;
3514 codec_dbg(codec, "---- dspload_post_setup ------\n");
3517 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080);
3518 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000);
3521 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002);
3528 * @codec: the HDA codec
3543 static int dspload_image(struct hda_codec *codec,
3554 codec_dbg(codec, "---- dspload_image begin ------\n");
3571 codec_dbg(codec, "Ready to program DMA\n");
3573 status = dsp_reset(codec);
3578 codec_dbg(codec, "dsp_reset() complete\n");
3579 status = dspxfr_image(codec, fls, reloc, sample_rate, channels,
3585 codec_dbg(codec, "dspxfr_image() complete\n");
3587 dspload_post_setup(codec);
3588 status = dsp_set_run_state(codec);
3591 codec_dbg(codec, "LOAD FINISHED\n");
3598 static bool dspload_is_loaded(struct hda_codec *codec)
3603 status = chipio_read(codec, 0x40004, &data);
3610 #define dspload_is_loaded(codec) false
3613 static bool dspload_wait_loaded(struct hda_codec *codec)
3618 if (dspload_is_loaded(codec)) {
3619 codec_info(codec, "ca0132 DSP downloaded and running\n");
3625 codec_err(codec, "ca0132 failed to download DSP\n");
3644 static void ca0113_mmio_gpio_set(struct hda_codec *codec, unsigned int gpio_pin,
3647 struct ca0132_spec *spec = codec->spec;
3664 static void ca0113_mmio_command_set(struct hda_codec *codec, unsigned int group,
3667 struct ca0132_spec *spec = codec->spec;
3703 static void ca0113_mmio_command_set_type2(struct hda_codec *codec,
3706 struct ca0132_spec *spec = codec->spec;
3743 static void ca0132_gpio_init(struct hda_codec *codec)
3745 struct ca0132_spec *spec = codec->spec;
3751 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
3752 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);
3753 snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23);
3756 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
3757 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B);
3766 static void ca0132_gpio_setup(struct hda_codec *codec)
3768 struct ca0132_spec *spec = codec->spec;
3772 snd_hda_codec_write(codec, 0x01, 0,
3774 snd_hda_codec_write(codec, 0x01, 0,
3776 snd_hda_codec_write(codec, 0x01, 0,
3778 snd_hda_codec_write(codec, 0x01, 0,
3782 snd_hda_codec_write(codec, 0x01, 0,
3784 snd_hda_codec_write(codec, 0x01, 0,
3786 snd_hda_codec_write(codec, 0x01, 0,
3836 static void r3di_gpio_mic_set(struct hda_codec *codec,
3842 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0);
3852 snd_hda_codec_write(codec, codec->core.afg, 0,
3856 static void r3di_gpio_dsp_status_set(struct hda_codec *codec,
3862 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0);
3867 snd_hda_codec_write(codec, codec->core.afg, 0,
3874 snd_hda_codec_write(codec, codec->core.afg, 0,
3881 snd_hda_codec_write(codec, codec->core.afg, 0,
3889 struct hda_codec *codec,
3894 struct ca0132_spec *spec = codec->spec;
3896 snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format);
3902 struct hda_codec *codec,
3905 struct ca0132_spec *spec = codec->spec;
3915 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]);
3921 struct hda_codec *codec,
3924 struct ca0132_spec *spec = codec->spec;
3949 struct hda_codec *codec,
3952 struct ca0132_spec *spec = codec->spec;
3953 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3957 struct hda_codec *codec,
3962 struct ca0132_spec *spec = codec->spec;
3963 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3968 struct hda_codec *codec,
3971 struct ca0132_spec *spec = codec->spec;
3972 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
3976 struct hda_codec *codec,
3979 struct ca0132_spec *spec = codec->spec;
3980 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3987 struct hda_codec *codec,
3992 snd_hda_codec_setup_stream(codec, hinfo->nid,
3999 struct hda_codec *codec,
4002 struct ca0132_spec *spec = codec->spec;
4007 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
4012 struct hda_codec *codec,
4015 struct ca0132_spec *spec = codec->spec;
4225 static int tuning_ctl_set(struct hda_codec *codec, hda_nid_t nid,
4236 snd_hda_power_up(codec);
4237 dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20,
4240 snd_hda_power_down(codec);
4248 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4249 struct ca0132_spec *spec = codec->spec;
4274 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4275 struct ca0132_spec *spec = codec->spec;
4288 tuning_ctl_set(codec, nid, voice_focus_vals_lookup, idx);
4309 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4310 struct ca0132_spec *spec = codec->spec;
4323 tuning_ctl_set(codec, nid, mic_svm_vals_lookup, idx);
4344 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4345 struct ca0132_spec *spec = codec->spec;
4358 tuning_ctl_set(codec, nid, equalizer_vals_lookup, idx);
4366 static int add_tuning_control(struct hda_codec *codec,
4403 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
4406 static int add_tuning_ctls(struct hda_codec *codec)
4412 err = add_tuning_control(codec,
4424 static void ca0132_init_tuning_defaults(struct hda_codec *codec)
4426 struct ca0132_spec *spec = codec->spec;
4446 static int ca0132_select_out(struct hda_codec *codec)
4448 struct ca0132_spec *spec = codec->spec;
4455 codec_dbg(codec, "ca0132_select_out\n");
4457 snd_hda_power_up_pm(codec);
4462 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp);
4473 codec_dbg(codec, "ca0132_select_out speaker\n");
4476 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp);
4481 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp);
4486 snd_hda_codec_write(codec, spec->out_pins[1], 0,
4488 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4490 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4492 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4496 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0,
4498 snd_hda_set_pin_ctl(codec, spec->out_pins[1],
4501 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,
4503 snd_hda_set_pin_ctl(codec, spec->out_pins[0],
4506 codec_dbg(codec, "ca0132_select_out hp\n");
4509 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp);
4514 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp);
4519 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4521 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4523 snd_hda_codec_write(codec, spec->out_pins[1], 0,
4525 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4529 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,
4531 snd_hda_set_pin_ctl(codec, spec->out_pins[0],
4534 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0,
4536 snd_hda_set_pin_ctl(codec, spec->out_pins[1],
4541 snd_hda_power_down_pm(codec);
4546 static int ae5_headphone_gain_set(struct hda_codec *codec, long val);
4547 static int zxr_headphone_gain_set(struct hda_codec *codec, long val);
4548 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val);
4550 static void ae5_mmio_select_out(struct hda_codec *codec)
4552 struct ca0132_spec *spec = codec->spec;
4562 ca0113_mmio_command_set(codec, out_cmds->group[i],
4567 static int ca0132_alt_set_full_range_speaker(struct hda_codec *codec)
4569 struct ca0132_spec *spec = codec->spec;
4581 err = dspio_set_uint_param(codec, 0x96,
4588 err = dspio_set_uint_param(codec, 0x96,
4593 err = dspio_set_uint_param(codec, 0x96,
4603 err = dspio_set_uint_param(codec, 0x96,
4612 static int ca0132_alt_surround_set_bass_redirection(struct hda_codec *codec,
4615 struct ca0132_spec *spec = codec->spec;
4625 err = dspio_set_uint_param(codec, 0x96, SPEAKER_BASS_REDIRECT, tmp);
4632 err = dspio_set_uint_param(codec, 0x96,
4645 static void ca0132_alt_select_out_get_quirk_data(struct hda_codec *codec,
4648 struct ca0132_spec *spec = codec->spec;
4661 static int ca0132_alt_select_out_quirk_set(struct hda_codec *codec)
4665 struct ca0132_spec *spec = codec->spec;
4669 ca0132_alt_select_out_get_quirk_data(codec, &quirk_data);
4675 ae5_mmio_select_out(codec);
4678 gpio_data = snd_hda_codec_read(codec, codec->core.afg, 0,
4686 snd_hda_codec_write(codec, codec->core.afg, 0,
4692 ca0113_mmio_gpio_set(codec, out_info->mmio_gpio_pin[i],
4699 err = dspio_set_uint_param(codec,
4708 chipio_set_control_param(codec, 0x0d, out_info->dac2port);
4711 chipio_write(codec, out_info->chipio_write_addr,
4718 ae5_headphone_gain_set(codec, 2);
4720 zxr_headphone_gain_set(codec, 0);
4723 ae5_headphone_gain_set(codec,
4726 zxr_headphone_gain_set(codec,
4734 static void ca0132_set_out_node_pincfg(struct hda_codec *codec, hda_nid_t nid,
4739 pin_ctl = snd_hda_codec_read(codec, nid, 0,
4744 snd_hda_set_pin_ctl(codec, nid, pin_ctl);
4755 static int ca0132_alt_select_out(struct hda_codec *codec)
4757 struct ca0132_spec *spec = codec->spec;
4765 codec_dbg(codec, "%s\n", __func__);
4767 snd_hda_power_up_pm(codec);
4777 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp) ||
4778 snd_hda_jack_detect(codec, spec->unsol_tag_front_hp);
4790 err = dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_MUTE, FLOAT_ONE);
4794 if (ca0132_alt_select_out_quirk_set(codec) < 0)
4799 codec_dbg(codec, "%s speaker\n", __func__);
4802 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4806 ca0132_set_out_node_pincfg(codec, spec->out_pins[1], 0, 0);
4808 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 1, 0);
4810 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 1, 0);
4812 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 1, 0);
4824 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp);
4830 codec_dbg(codec, "%s hp\n", __func__);
4831 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4835 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 0, 0);
4836 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 0, 0);
4837 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 0, 0);
4840 if (snd_hda_jack_detect(codec, spec->unsol_tag_front_hp))
4842 else if (snd_hda_jack_detect(codec, spec->unsol_tag_hp))
4845 ca0132_set_out_node_pincfg(codec, headphone_nid, 1, 1);
4848 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE);
4850 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO);
4862 ca0132_effects_set(codec, X_BASS,
4866 err = dspio_set_uint_param(codec, 0x8f, 0x01, FLOAT_ZERO);
4874 err = dspio_set_uint_param(codec, 0x96,
4880 err = ca0132_alt_surround_set_bass_redirection(codec,
4883 err = ca0132_alt_surround_set_bass_redirection(codec, 0);
4886 err = dspio_set_uint_param(codec, 0x96,
4892 err = ca0132_alt_set_full_range_speaker(codec);
4898 snd_hda_power_down_pm(codec);
4910 ca0132_alt_select_out(spec->codec);
4912 ca0132_select_out(spec->codec);
4914 jack = snd_hda_jack_tbl_get(spec->codec, spec->unsol_tag_hp);
4917 snd_hda_jack_report_sync(spec->codec);
4921 static void ca0132_set_dmic(struct hda_codec *codec, int enable);
4922 static int ca0132_mic_boost_set(struct hda_codec *codec, long val);
4923 static void resume_mic1(struct hda_codec *codec, unsigned int oldval);
4924 static int stop_mic1(struct hda_codec *codec);
4925 static int ca0132_cvoice_switch_set(struct hda_codec *codec);
4926 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val);
4931 static int ca0132_set_vipsource(struct hda_codec *codec, int val)
4933 struct ca0132_spec *spec = codec->spec;
4942 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0);
4943 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
4944 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
4949 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4951 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
4953 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000);
4954 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000);
4959 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4961 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
4963 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val);
4969 static int ca0132_alt_set_vipsource(struct hda_codec *codec, int val)
4971 struct ca0132_spec *spec = codec->spec;
4977 codec_dbg(codec, "%s\n", __func__);
4979 chipio_set_stream_control(codec, 0x03, 0);
4980 chipio_set_stream_control(codec, 0x04, 0);
4985 codec_dbg(codec, "%s: off.", __func__);
4986 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0);
4989 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
4991 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
4992 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
4994 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
5006 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
5009 codec_dbg(codec, "%s: on.", __func__);
5010 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000);
5011 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000);
5013 chipio_set_conn_rate(codec, 0x0F, SR_16_000);
5019 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
5022 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
5025 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val);
5028 chipio_set_stream_control(codec, 0x03, 1);
5029 chipio_set_stream_control(codec, 0x04, 1);
5040 static int ca0132_select_mic(struct hda_codec *codec)
5042 struct ca0132_spec *spec = codec->spec;
5046 codec_dbg(codec, "ca0132_select_mic\n");
5048 snd_hda_power_up_pm(codec);
5053 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_amic1);
5065 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_32_000);
5066 ca0132_set_dmic(codec, 1);
5067 ca0132_mic_boost_set(codec, 0);
5069 ca0132_effects_set(codec, VOICE_FOCUS,
5074 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_96_000);
5075 ca0132_set_dmic(codec, 0);
5076 ca0132_mic_boost_set(codec, spec->cur_mic_boost);
5078 ca0132_effects_set(codec, VOICE_FOCUS, 0);
5081 snd_hda_power_down_pm(codec);
5092 static int ca0132_alt_select_in(struct hda_codec *codec)
5094 struct ca0132_spec *spec = codec->spec;
5097 codec_dbg(codec, "%s\n", __func__);
5099 snd_hda_power_up_pm(codec);
5101 chipio_set_stream_control(codec, 0x03, 0);
5102 chipio_set_stream_control(codec, 0x04, 0);
5111 ca0113_mmio_gpio_set(codec, 0, false);
5118 r3di_gpio_mic_set(codec, R3DI_REAR_MIC);
5122 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);
5126 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);
5128 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2,
5130 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2,
5132 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO);
5139 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
5140 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
5142 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
5144 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
5146 chipio_set_stream_control(codec, 0x03, 1);
5147 chipio_set_stream_control(codec, 0x04, 1);
5150 chipio_write(codec, 0x18B098, 0x0000000C);
5151 chipio_write(codec, 0x18B09C, 0x0000000C);
5154 chipio_write(codec, 0x18B098, 0x0000000C);
5155 chipio_write(codec, 0x18B09C, 0x000000CC);
5158 chipio_write(codec, 0x18B098, 0x0000000C);
5159 chipio_write(codec, 0x18B09C, 0x0000004C);
5164 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val);
5167 ca0132_mic_boost_set(codec, 0);
5171 ca0113_mmio_gpio_set(codec, 0, false);
5174 r3di_gpio_mic_set(codec, R3DI_REAR_MIC);
5177 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);
5180 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f);
5181 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2,
5183 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2,
5185 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO);
5191 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
5192 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
5194 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
5200 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
5205 chipio_write(codec, 0x18B098, 0x00000000);
5206 chipio_write(codec, 0x18B09C, 0x00000000);
5211 chipio_set_stream_control(codec, 0x03, 1);
5212 chipio_set_stream_control(codec, 0x04, 1);
5218 ca0113_mmio_gpio_set(codec, 0, true);
5219 ca0113_mmio_gpio_set(codec, 5, false);
5223 r3di_gpio_mic_set(codec, R3DI_FRONT_MIC);
5227 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f);
5235 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
5236 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
5238 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
5240 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
5242 chipio_set_stream_control(codec, 0x03, 1);
5243 chipio_set_stream_control(codec, 0x04, 1);
5247 chipio_write(codec, 0x18B098, 0x0000000C);
5248 chipio_write(codec, 0x18B09C, 0x000000CC);
5251 chipio_write(codec, 0x18B098, 0x0000000C);
5252 chipio_write(codec, 0x18B09C, 0x0000004C);
5257 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val);
5260 ca0132_cvoice_switch_set(codec);
5262 snd_hda_power_down_pm(codec);
5269 static bool ca0132_is_vnode_effective(struct hda_codec *codec,
5273 struct ca0132_spec *spec = codec->spec;
5297 static int ca0132_voicefx_set(struct hda_codec *codec, int enable)
5299 struct ca0132_spec *spec = codec->spec;
5310 dspio_set_uint_param(codec, ca0132_voicefx.mid,
5319 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val)
5321 struct ca0132_spec *spec = codec->spec;
5366 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
5385 dspio_set_uint_param(codec, 0x47, 0x00, tmp);
5394 codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n",
5398 err = dspio_set_uint_param(codec, ca0132_effects[idx].mid,
5410 static int ca0132_pe_switch_set(struct hda_codec *codec)
5412 struct ca0132_spec *spec = codec->spec;
5416 codec_dbg(codec, "ca0132_pe_switch_set: val=%ld\n",
5420 ca0132_alt_select_out(codec);
5426 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]);
5432 static int stop_mic1(struct hda_codec *codec)
5434 struct ca0132_spec *spec = codec->spec;
5435 unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0,
5438 snd_hda_codec_write(codec, spec->adcs[0], 0,
5445 static void resume_mic1(struct hda_codec *codec, unsigned int oldval)
5447 struct ca0132_spec *spec = codec->spec;
5450 snd_hda_codec_write(codec, spec->adcs[0], 0,
5458 static int ca0132_cvoice_switch_set(struct hda_codec *codec)
5460 struct ca0132_spec *spec = codec->spec;
5465 codec_dbg(codec, "ca0132_cvoice_switch_set: val=%ld\n",
5472 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]);
5475 ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0));
5478 oldval = stop_mic1(codec);
5480 ret |= ca0132_alt_set_vipsource(codec, 1);
5482 ret |= ca0132_set_vipsource(codec, 1);
5483 resume_mic1(codec, oldval);
5487 static int ca0132_mic_boost_set(struct hda_codec *codec, long val)
5489 struct ca0132_spec *spec = codec->spec;
5493 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,
5496 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,
5502 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val)
5504 struct ca0132_spec *spec = codec->spec;
5507 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,
5512 static int ae5_headphone_gain_set(struct hda_codec *codec, long val)
5517 ca0113_mmio_command_set(codec, 0x48, 0x11 + i,
5526 static int zxr_headphone_gain_set(struct hda_codec *codec, long val)
5528 ca0113_mmio_gpio_set(codec, 1, val);
5536 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5541 struct ca0132_spec *spec = codec->spec;
5549 ca0132_alt_select_out(codec);
5551 ca0132_select_out(codec);
5560 ca0132_select_mic(codec);
5566 ca0132_alt_select_out(codec);
5568 ca0132_select_out(codec);
5573 ca0132_select_mic(codec);
5578 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid);
5584 mutex_lock(&codec->control_mutex);
5590 mutex_unlock(&codec->control_mutex);
5597 static void ca0132_alt_bass_redirection_xover_set(struct hda_codec *codec,
5600 snd_hda_power_up(codec);
5602 dspio_set_param(codec, 0x96, 0x20, SPEAKER_BASS_REDIRECT_XOVER_FREQ,
5605 snd_hda_power_down(codec);
5617 static int ca0132_alt_slider_ctl_set(struct hda_codec *codec, hda_nid_t nid,
5631 snd_hda_power_up(codec);
5637 dspio_set_param(codec, ca0132_effects[i].mid, 0x20,
5646 dspio_set_param(codec, ca0132_effects[i].mid, 0x20,
5651 snd_hda_power_down(codec);
5659 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5660 struct ca0132_spec *spec = codec->spec;
5675 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5676 struct ca0132_spec *spec = codec->spec;
5718 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5719 struct ca0132_spec *spec = codec->spec;
5738 ca0132_alt_bass_redirection_xover_set(codec, *cur_val);
5740 ca0132_alt_slider_ctl_set(codec, nid, float_xbass_xover_lookup, idx);
5748 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5749 struct ca0132_spec *spec = codec->spec;
5762 ca0132_alt_slider_ctl_set(codec, nid, float_zero_to_one_lookup, idx);
5795 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5796 struct ca0132_spec *spec = codec->spec;
5805 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5806 struct ca0132_spec *spec = codec->spec;
5813 codec_dbg(codec, "ca0132_alt_mic_boost: boost=%d\n",
5819 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val);
5849 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5850 struct ca0132_spec *spec = codec->spec;
5859 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5860 struct ca0132_spec *spec = codec->spec;
5867 codec_dbg(codec, "ae5_headphone_gain: boost=%d\n",
5873 ae5_headphone_gain_set(codec, spec->ae5_headphone_gain_val);
5902 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5903 struct ca0132_spec *spec = codec->spec;
5912 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5913 struct ca0132_spec *spec = codec->spec;
5920 codec_dbg(codec, "ae5_sound_filter: %s\n",
5925 ca0113_mmio_command_set_type2(codec, 0x48, 0x07,
5952 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5953 struct ca0132_spec *spec = codec->spec;
5962 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5963 struct ca0132_spec *spec = codec->spec;
5977 codec_dbg(codec, "ca0132_alt_input_select: sel=%d, preset=%s\n",
5982 ca0132_alt_select_in(codec);
6004 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6005 struct ca0132_spec *spec = codec->spec;
6014 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6015 struct ca0132_spec *spec = codec->spec;
6023 codec_dbg(codec, "ca0132_alt_output_select: sel=%d, preset=%s\n",
6031 ca0132_alt_select_out(codec);
6055 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6056 struct ca0132_spec *spec = codec->spec;
6065 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6066 struct ca0132_spec *spec = codec->spec;
6073 codec_dbg(codec, "ca0132_alt_speaker_channels: sel=%d, channels=%s\n",
6079 ca0132_alt_select_out(codec);
6108 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6109 struct ca0132_spec *spec = codec->spec;
6118 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6119 struct ca0132_spec *spec = codec->spec;
6128 codec_dbg(codec, "ca0132_alt_svm_setting: sel=%d, preset=%s\n",
6148 dspio_set_uint_param(codec, ca0132_effects[idx].mid,
6172 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6173 struct ca0132_spec *spec = codec->spec;
6182 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6183 struct ca0132_spec *spec = codec->spec;
6191 codec_dbg(codec, "%s: sel=%d, preset=%s\n", __func__, sel,
6198 err = dspio_set_uint_param(codec, ca0132_alt_eq_enum.mid,
6229 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6230 struct ca0132_spec *spec = codec->spec;
6239 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6240 struct ca0132_spec *spec = codec->spec;
6247 codec_dbg(codec, "ca0132_voicefx_put: sel=%d, preset=%s\n",
6255 err = dspio_set_uint_param(codec, ca0132_voicefx.mid,
6265 ca0132_voicefx_set(codec, (sel ? 1 : 0));
6274 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6275 struct ca0132_spec *spec = codec->spec;
6326 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6327 struct ca0132_spec *spec = codec->spec;
6333 codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n",
6336 snd_hda_power_up(codec);
6354 changed = ca0132_pe_switch_set(codec);
6361 changed = ca0132_cvoice_switch_set(codec);
6369 changed = ca0132_effects_set(codec, nid, *valp);
6378 changed = ca0132_mic_boost_set(codec, *valp);
6382 changed = ca0132_mic_boost_set(codec, *valp);
6391 changed = zxr_headphone_gain_set(codec, *valp);
6401 ca0132_alt_set_full_range_speaker(codec);
6409 ca0132_alt_surround_set_bass_redirection(codec, *valp);
6415 snd_hda_power_down(codec);
6427 static void ca0132_alt_dsp_volume_put(struct hda_codec *codec, hda_nid_t nid)
6429 struct ca0132_spec *spec = codec->spec;
6440 dspio_set_uint_param(codec,
6447 dspio_set_uint_param(codec,
6452 dspio_set_uint_param(codec,
6460 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6461 struct ca0132_spec *spec = codec->spec;
6472 mutex_lock(&codec->control_mutex);
6477 mutex_unlock(&codec->control_mutex);
6482 mutex_lock(&codec->control_mutex);
6487 mutex_unlock(&codec->control_mutex);
6498 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6499 struct ca0132_spec *spec = codec->spec;
6519 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6520 struct ca0132_spec *spec = codec->spec;
6539 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid);
6544 snd_hda_power_up(codec);
6545 mutex_lock(&codec->control_mutex);
6551 mutex_unlock(&codec->control_mutex);
6552 snd_hda_power_down(codec);
6566 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6567 struct ca0132_spec *spec = codec->spec;
6593 snd_hda_power_up(codec);
6594 ca0132_alt_dsp_volume_put(codec, vnid);
6595 mutex_lock(&codec->control_mutex);
6597 mutex_unlock(&codec->control_mutex);
6598 snd_hda_power_down(codec);
6606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6607 struct ca0132_spec *spec = codec->spec;
6618 mutex_lock(&codec->control_mutex);
6623 mutex_unlock(&codec->control_mutex);
6628 mutex_lock(&codec->control_mutex);
6633 mutex_unlock(&codec->control_mutex);
6642 static int ca0132_alt_add_effect_slider(struct hda_codec *codec, hda_nid_t nid,
6669 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
6677 static int add_fx_switch(struct hda_codec *codec, hda_nid_t nid,
6680 struct ca0132_spec *spec = codec->spec;
6693 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
6696 static int add_voicefx(struct hda_codec *codec)
6704 return snd_hda_ctl_add(codec, VOICEFX, snd_ctl_new1(&knew, codec));
6708 static int add_ca0132_alt_eq_presets(struct hda_codec *codec)
6716 return snd_hda_ctl_add(codec, EQ_PRESET_ENUM,
6717 snd_ctl_new1(&knew, codec));
6725 static int ca0132_alt_add_svm_enum(struct hda_codec *codec)
6733 return snd_hda_ctl_add(codec, SMART_VOLUME_ENUM,
6734 snd_ctl_new1(&knew, codec));
6742 static int ca0132_alt_add_output_enum(struct hda_codec *codec)
6750 return snd_hda_ctl_add(codec, OUTPUT_SOURCE_ENUM,
6751 snd_ctl_new1(&knew, codec));
6759 static int ca0132_alt_add_speaker_channel_cfg_enum(struct hda_codec *codec)
6767 return snd_hda_ctl_add(codec, SPEAKER_CHANNEL_CFG_ENUM,
6768 snd_ctl_new1(&knew, codec));
6776 static int ca0132_alt_add_front_full_range_switch(struct hda_codec *codec)
6782 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_FRONT,
6783 snd_ctl_new1(&knew, codec));
6786 static int ca0132_alt_add_rear_full_range_switch(struct hda_codec *codec)
6792 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_REAR,
6793 snd_ctl_new1(&knew, codec));
6802 static int ca0132_alt_add_bass_redirection_crossover(struct hda_codec *codec)
6814 return snd_hda_ctl_add(codec, BASS_REDIRECTION_XOVER,
6815 snd_ctl_new1(&knew, codec));
6818 static int ca0132_alt_add_bass_redirection_switch(struct hda_codec *codec)
6825 return snd_hda_ctl_add(codec, BASS_REDIRECTION,
6826 snd_ctl_new1(&knew, codec));
6834 static int ca0132_alt_add_input_enum(struct hda_codec *codec)
6842 return snd_hda_ctl_add(codec, INPUT_SOURCE_ENUM,
6843 snd_ctl_new1(&knew, codec));
6850 static int ca0132_alt_add_mic_boost_enum(struct hda_codec *codec)
6858 return snd_hda_ctl_add(codec, MIC_BOOST_ENUM,
6859 snd_ctl_new1(&knew, codec));
6868 static int ae5_add_headphone_gain_enum(struct hda_codec *codec)
6876 return snd_hda_ctl_add(codec, AE5_HEADPHONE_GAIN_ENUM,
6877 snd_ctl_new1(&knew, codec));
6885 static int ae5_add_sound_filter_enum(struct hda_codec *codec)
6893 return snd_hda_ctl_add(codec, AE5_SOUND_FILTER_ENUM,
6894 snd_ctl_new1(&knew, codec));
6897 static int zxr_add_headphone_gain_switch(struct hda_codec *codec)
6903 return snd_hda_ctl_add(codec, ZXR_HEADPHONE_GAIN,
6904 snd_ctl_new1(&knew, codec));
6934 static void ca0132_alt_add_chmap_ctls(struct hda_codec *codec)
6939 list_for_each_entry(pcm, &codec->pcm_list_head, list) {
6951 codec_dbg(codec, "snd_pcm_add_chmap_ctls failed!");
7027 static int ca0132_build_controls(struct hda_codec *codec)
7029 struct ca0132_spec *spec = codec->spec;
7035 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
7041 snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT,
7043 snd_hda_add_vmaster(codec, "Master Playback Volume",
7046 err = __snd_hda_add_vmaster(codec, "Master Playback Switch",
7066 err = add_fx_switch(codec, ca0132_effects[i].nid,
7073 * If codec has use_alt_controls set to true, add effect level sliders,
7078 err = ca0132_alt_add_svm_enum(codec);
7082 err = add_ca0132_alt_eq_presets(codec);
7086 err = add_fx_switch(codec, PLAY_ENHANCEMENT,
7091 err = add_fx_switch(codec, CRYSTAL_VOICE,
7098 err = ca0132_alt_add_effect_slider(codec,
7106 err = ca0132_alt_add_effect_slider(codec, XBASS_XOVER,
7112 err = add_fx_switch(codec, PLAY_ENHANCEMENT,
7117 err = add_fx_switch(codec, CRYSTAL_VOICE,
7122 err = add_voicefx(codec);
7127 * If the codec uses alt_functions, you need the enumerated controls
7132 err = ca0132_alt_add_output_enum(codec);
7135 err = ca0132_alt_add_speaker_channel_cfg_enum(codec);
7138 err = ca0132_alt_add_front_full_range_switch(codec);
7141 err = ca0132_alt_add_rear_full_range_switch(codec);
7144 err = ca0132_alt_add_bass_redirection_crossover(codec);
7147 err = ca0132_alt_add_bass_redirection_switch(codec);
7150 err = ca0132_alt_add_mic_boost_enum(codec);
7158 err = ca0132_alt_add_input_enum(codec);
7167 err = ae5_add_headphone_gain_enum(codec);
7170 err = ae5_add_sound_filter_enum(codec);
7175 err = zxr_add_headphone_gain_switch(codec);
7184 add_tuning_ctls(codec);
7187 err = snd_hda_jack_add_kctls(codec, &spec->autocfg);
7192 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out,
7196 err = snd_hda_create_spdif_share_sw(codec, &spec->multiout);
7203 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in);
7209 ca0132_alt_add_chmap_ctls(codec);
7214 static int dbpro_build_controls(struct hda_codec *codec)
7216 struct ca0132_spec *spec = codec->spec;
7220 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out,
7227 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in);
7278 static int ca0132_build_pcms(struct hda_codec *codec)
7280 struct ca0132_spec *spec = codec->spec;
7283 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog");
7301 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog Mic-In2");
7310 info = snd_hda_codec_pcm_new(codec, "CA0132 What U Hear");
7320 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital");
7338 static int dbpro_build_pcms(struct hda_codec *codec)
7340 struct ca0132_spec *spec = codec->spec;
7343 info = snd_hda_codec_pcm_new(codec, "CA0132 Alt Analog");
7354 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital");
7372 static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac)
7375 snd_hda_set_pin_ctl(codec, pin, PIN_HP);
7376 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
7377 snd_hda_codec_write(codec, pin, 0,
7381 if (dac && (get_wcaps(codec, dac) & AC_WCAP_OUT_AMP))
7382 snd_hda_codec_write(codec, dac, 0,
7386 static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc)
7389 snd_hda_set_pin_ctl(codec, pin, PIN_VREF80);
7390 if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP)
7391 snd_hda_codec_write(codec, pin, 0,
7395 if (adc && (get_wcaps(codec, adc) & AC_WCAP_IN_AMP)) {
7396 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE,
7400 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0,
7402 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0,
7407 static void refresh_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir)
7411 caps = snd_hda_param_read(codec, nid, dir == HDA_OUTPUT ?
7413 snd_hda_override_amp_caps(codec, nid, dir, caps);
7419 static void ca0132_set_dmic(struct hda_codec *codec, int enable)
7421 struct ca0132_spec *spec = codec->spec;
7426 codec_dbg(codec, "ca0132_set_dmic: enable=%d\n", enable);
7428 oldval = stop_mic1(codec);
7429 ca0132_set_vipsource(codec, 0);
7433 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
7437 snd_hda_codec_write(codec, spec->input_pins[0], 0,
7441 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 1);
7445 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
7450 snd_hda_codec_write(codec, spec->input_pins[0], 0,
7454 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0);
7456 ca0132_set_vipsource(codec, 1);
7457 resume_mic1(codec, oldval);
7463 static void ca0132_init_dmic(struct hda_codec *codec)
7465 struct ca0132_spec *spec = codec->spec;
7478 snd_hda_codec_write(codec, spec->input_pins[0], 0,
7488 snd_hda_codec_write(codec, spec->input_pins[0], 0,
7504 snd_hda_codec_write(codec, spec->input_pins[0], 0,
7511 static void ca0132_init_analog_mic2(struct hda_codec *codec)
7513 struct ca0132_spec *spec = codec->spec;
7517 chipio_8051_write_exram_no_mutex(codec, 0x1920, 0x00);
7518 chipio_8051_write_exram_no_mutex(codec, 0x192d, 0x00);
7523 static void ca0132_refresh_widget_caps(struct hda_codec *codec)
7525 struct ca0132_spec *spec = codec->spec;
7528 codec_dbg(codec, "ca0132_refresh_widget_caps.\n");
7529 snd_hda_codec_update_widgets(codec);
7532 refresh_amp_caps(codec, spec->dacs[i], HDA_OUTPUT);
7535 refresh_amp_caps(codec, spec->out_pins[i], HDA_OUTPUT);
7538 refresh_amp_caps(codec, spec->adcs[i], HDA_INPUT);
7539 refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT);
7545 static void ca0132_alt_free_active_dma_channels(struct hda_codec *codec)
7551 status = chipio_read(codec, DSPDMAC_CHNLSTART_MODULE_OFFSET, &tmp);
7560 codec_dbg(codec, "%s: Failed to read active DSP DMA channel register.\n",
7570 if (dsp_is_dma_active(codec, i)) {
7571 status = dspio_free_dma_chan(codec, i);
7573 codec_dbg(codec, "%s: Failed to free active DSP DMA channel %d.\n",
7600 static void ca0132_alt_start_dsp_audio_streams(struct hda_codec *codec)
7603 struct ca0132_spec *spec = codec->spec;
7613 chipio_get_stream_control(codec, dsp_dma_stream_ids[i], &tmp);
7616 chipio_set_stream_control(codec,
7628 ca0132_alt_free_active_dma_channels(codec);
7633 chipio_set_stream_channels(codec, 0x0c, 6);
7636 chipio_set_stream_control(codec,
7690 static void chipio_remap_stream(struct hda_codec *codec,
7696 chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id,
7708 chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id,
7717 codec_info(codec, "%s: Stream 0x%02x ports aren't allocated, remap failed!\n",
7727 chipio_write_no_mutex(codec,
7733 chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
7757 static void ca0132_alt_init_speaker_tuning(struct hda_codec *codec)
7759 struct ca0132_spec *spec = codec->spec;
7780 dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_ENABLE_CENTER_EQ, tmp);
7785 dspio_set_uint_param(codec, 0x96, i, tmp);
7790 dspio_set_uint_param(codec, 0x96, i, tmp);
7794 dspio_set_uint_param(codec, 0x96,
7801 static void ca0132_alt_init_analog_mics(struct hda_codec *codec)
7803 struct ca0132_spec *spec = codec->spec;
7807 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
7808 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
7810 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
7814 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
7817 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, SR_96_000);
7818 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, SR_96_000);
7820 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
7822 dspio_set_uint_param(codec, 0x80, 0x01, tmp);
7831 static void sbz_connect_streams(struct hda_codec *codec)
7833 struct ca0132_spec *spec = codec->spec;
7837 codec_dbg(codec, "Connect Streams entered, mutex locked and loaded.\n");
7840 chipio_write_no_mutex(codec, 0x18a020, 0x00000043);
7843 chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91);
7844 chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000);
7845 chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000);
7846 chipio_set_stream_channels(codec, 0x14, 2);
7847 chipio_set_stream_control(codec, 0x14, 1);
7849 codec_dbg(codec, "Connect Streams exited, mutex released.\n");
7860 static void sbz_chipio_startup_data(struct hda_codec *codec)
7863 struct ca0132_spec *spec = codec->spec;
7866 codec_dbg(codec, "Startup Data entered, mutex locked and loaded.\n");
7869 chipio_remap_stream(codec, &stream_remap_data[0]);
7887 chipio_remap_stream(codec, dsp_out_remap_data);
7889 codec_dbg(codec, "Startup Data exited, mutex released.\n");
7893 static void ca0132_alt_dsp_initial_mic_setup(struct hda_codec *codec)
7895 struct ca0132_spec *spec = codec->spec;
7898 chipio_set_stream_control(codec, 0x03, 0);
7899 chipio_set_stream_control(codec, 0x04, 0);
7901 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
7902 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
7905 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
7907 chipio_set_stream_control(codec, 0x03, 1);
7908 chipio_set_stream_control(codec, 0x04, 1);
7912 chipio_write(codec, 0x18b098, 0x0000000c);
7913 chipio_write(codec, 0x18b09C, 0x0000000c);
7916 chipio_write(codec, 0x18b098, 0x0000000c);
7917 chipio_write(codec, 0x18b09c, 0x0000004c);
7924 static void ae5_post_dsp_register_set(struct hda_codec *codec)
7926 struct ca0132_spec *spec = codec->spec;
7928 chipio_8051_write_direct(codec, 0x93, 0x10);
7929 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2);
7944 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x3f);
7945 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f);
7946 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);
7949 static void ae5_post_dsp_param_setup(struct hda_codec *codec)
7956 chipio_set_control_param(codec, 3, 0);
7961 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1);
7963 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83);
7964 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);
7966 chipio_8051_write_exram(codec, 0xfa92, 0x22);
7969 static void ae5_post_dsp_pll_setup(struct hda_codec *codec)
7971 chipio_8051_write_pll_pmu(codec, 0x41, 0xc8);
7972 chipio_8051_write_pll_pmu(codec, 0x45, 0xcc);
7973 chipio_8051_write_pll_pmu(codec, 0x40, 0xcb);
7974 chipio_8051_write_pll_pmu(codec, 0x43, 0xc7);
7975 chipio_8051_write_pll_pmu(codec, 0x51, 0x8d);
7978 static void ae5_post_dsp_stream_setup(struct hda_codec *codec)
7980 struct ca0132_spec *spec = codec->spec;
7984 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81);
7986 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000);
7988 chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0);
7990 chipio_set_stream_source_dest(codec, 0x18, 0x9, 0xd0);
7991 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000);
7992 chipio_set_stream_channels(codec, 0x18, 6);
7993 chipio_set_stream_control(codec, 0x18, 1);
7995 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4);
7997 chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7);
7999 ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80);
8004 static void ae5_post_dsp_startup_data(struct hda_codec *codec)
8006 struct ca0132_spec *spec = codec->spec;
8010 chipio_write_no_mutex(codec, 0x189000, 0x0001f101);
8011 chipio_write_no_mutex(codec, 0x189004, 0x0001f101);
8012 chipio_write_no_mutex(codec, 0x189024, 0x00014004);
8013 chipio_write_no_mutex(codec, 0x189028, 0x0002000f);
8015 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05);
8016 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7);
8017 ca0113_mmio_command_set(codec, 0x48, 0x0b, 0x12);
8018 ca0113_mmio_command_set(codec, 0x48, 0x04, 0x00);
8019 ca0113_mmio_command_set(codec, 0x48, 0x06, 0x48);
8020 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05);
8021 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);
8022 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00);
8023 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00);
8024 ca0113_mmio_gpio_set(codec, 0, true);
8025 ca0113_mmio_gpio_set(codec, 1, true);
8026 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x80);
8028 chipio_write_no_mutex(codec, 0x18b03c, 0x00000012);
8030 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00);
8031 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00);
8036 static void ae7_post_dsp_setup_ports(struct hda_codec *codec)
8038 struct ca0132_spec *spec = codec->spec;
8043 chipio_remap_stream(codec, &stream_remap_data[1]);
8045 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00);
8046 ca0113_mmio_command_set(codec, 0x48, 0x0d, 0x40);
8047 ca0113_mmio_command_set(codec, 0x48, 0x17, 0x00);
8048 ca0113_mmio_command_set(codec, 0x48, 0x19, 0x00);
8049 ca0113_mmio_command_set(codec, 0x48, 0x11, 0xff);
8050 ca0113_mmio_command_set(codec, 0x48, 0x12, 0xff);
8051 ca0113_mmio_command_set(codec, 0x48, 0x13, 0xff);
8052 ca0113_mmio_command_set(codec, 0x48, 0x14, 0x7f);
8057 static void ae7_post_dsp_asi_stream_setup(struct hda_codec *codec)
8059 struct ca0132_spec *spec = codec->spec;
8063 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81);
8064 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00);
8066 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000);
8068 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00);
8069 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0);
8071 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000);
8072 chipio_set_stream_channels(codec, 0x18, 6);
8073 chipio_set_stream_control(codec, 0x18, 1);
8075 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4);
8080 static void ae7_post_dsp_pll_setup(struct hda_codec *codec)
8091 chipio_8051_write_pll_pmu_no_mutex(codec, addr[i], data[i]);
8094 static void ae7_post_dsp_asi_setup_ports(struct hda_codec *codec)
8096 struct ca0132_spec *spec = codec->spec;
8107 chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7);
8109 chipio_write_no_mutex(codec, 0x189000, 0x0001f101);
8110 chipio_write_no_mutex(codec, 0x189004, 0x0001f101);
8111 chipio_write_no_mutex(codec, 0x189024, 0x00014004);
8112 chipio_write_no_mutex(codec, 0x189028, 0x0002000f);
8114 ae7_post_dsp_pll_setup(codec);
8115 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7);
8118 ca0113_mmio_command_set(codec, 0x48, target[i], data[i]);
8120 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);
8121 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00);
8122 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00);
8124 chipio_set_stream_source_dest(codec, 0x21, 0x64, 0x56);
8125 chipio_set_stream_channels(codec, 0x21, 2);
8126 chipio_set_conn_rate_no_mutex(codec, 0x56, SR_8_000);
8128 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_NODE_ID, 0x09);
8134 chipio_set_control_param_no_mutex(codec, 0x20, 0x21);
8136 chipio_write_no_mutex(codec, 0x18b038, 0x00000088);
8147 ca0113_mmio_gpio_set(codec, 0, 1);
8148 ca0113_mmio_gpio_set(codec, 1, 1);
8150 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);
8151 chipio_write_no_mutex(codec, 0x18b03c, 0x00000000);
8152 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00);
8153 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00);
8155 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00);
8156 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0);
8158 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000);
8159 chipio_set_stream_channels(codec, 0x18, 6);
8165 ae7_post_dsp_pll_setup(codec);
8166 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7);
8176 static void ae7_post_dsp_asi_setup(struct hda_codec *codec)
8178 chipio_8051_write_direct(codec, 0x93, 0x10);
8180 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2);
8182 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);
8183 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f);
8185 chipio_set_control_param(codec, 3, 3);
8186 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1);
8188 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83);
8189 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);
8190 snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00);
8192 chipio_8051_write_exram(codec, 0xfa92, 0x22);
8194 ae7_post_dsp_pll_setup(codec);
8195 ae7_post_dsp_asi_stream_setup(codec);
8197 chipio_8051_write_pll_pmu(codec, 0x43, 0xc7);
8199 ae7_post_dsp_asi_setup_ports(codec);
8205 static void ca0132_setup_defaults(struct hda_codec *codec)
8207 struct ca0132_spec *spec = codec->spec;
8219 dspio_set_uint_param(codec, ca0132_effects[idx].mid,
8227 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
8230 dspio_set_uint_param(codec, 0x8f, 0x01, tmp);
8234 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
8235 dspio_set_uint_param(codec, 0x80, 0x01, tmp);
8239 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
8243 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
8250 static void r3d_setup_defaults(struct hda_codec *codec)
8252 struct ca0132_spec *spec = codec->spec;
8260 ca0132_alt_init_analog_mics(codec);
8261 ca0132_alt_start_dsp_audio_streams(codec);
8265 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
8269 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
8270 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
8273 dspio_set_uint_param(codec, 0x32, 0x00, tmp);
8276 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADED);
8280 ca0113_mmio_gpio_set(codec, 2, false);
8281 ca0113_mmio_gpio_set(codec, 4, true);
8288 dspio_set_uint_param(codec,
8300 static void sbz_setup_defaults(struct hda_codec *codec)
8302 struct ca0132_spec *spec = codec->spec;
8310 ca0132_alt_init_analog_mics(codec);
8311 ca0132_alt_start_dsp_audio_streams(codec);
8312 sbz_connect_streams(codec);
8313 sbz_chipio_startup_data(codec);
8320 dspio_set_uint_param(codec, 0x37, 0x08, tmp);
8321 dspio_set_uint_param(codec, 0x37, 0x10, tmp);
8325 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
8329 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
8330 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
8333 dspio_set_uint_param(codec, 0x32, 0x00, tmp);
8335 ca0132_alt_dsp_initial_mic_setup(codec);
8341 dspio_set_uint_param(codec,
8348 ca0132_alt_init_speaker_tuning(codec);
8354 static void ae5_setup_defaults(struct hda_codec *codec)
8356 struct ca0132_spec *spec = codec->spec;
8364 ca0132_alt_init_analog_mics(codec);
8365 ca0132_alt_start_dsp_audio_streams(codec);
8369 dspio_set_uint_param(codec, 0x96, 0x29, tmp);
8370 dspio_set_uint_param(codec, 0x96, 0x2a, tmp);
8371 dspio_set_uint_param(codec, 0x80, 0x0d, tmp);
8372 dspio_set_uint_param(codec, 0x80, 0x0e, tmp);
8374 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f);
8375 ca0113_mmio_gpio_set(codec, 0, false);
8376 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);
8380 dspio_set_uint_param(codec, 0x37, 0x08, tmp);
8381 dspio_set_uint_param(codec, 0x37, 0x10, tmp);
8385 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
8389 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
8390 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
8393 dspio_set_uint_param(codec, 0x32, 0x00, tmp);
8395 ca0132_alt_dsp_initial_mic_setup(codec);
8396 ae5_post_dsp_register_set(codec);
8397 ae5_post_dsp_param_setup(codec);
8398 ae5_post_dsp_pll_setup(codec);
8399 ae5_post_dsp_stream_setup(codec);
8400 ae5_post_dsp_startup_data(codec);
8406 dspio_set_uint_param(codec,
8413 ca0132_alt_init_speaker_tuning(codec);
8419 static void ae7_setup_defaults(struct hda_codec *codec)
8421 struct ca0132_spec *spec = codec->spec;
8429 ca0132_alt_init_analog_mics(codec);
8430 ca0132_alt_start_dsp_audio_streams(codec);
8431 ae7_post_dsp_setup_ports(codec);
8434 dspio_set_uint_param(codec, 0x96,
8436 dspio_set_uint_param(codec, 0x96,
8439 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f);
8442 dspio_set_uint_param(codec, 0x80, 0x0d, tmp);
8443 dspio_set_uint_param(codec, 0x80, 0x0e, tmp);
8445 ca0113_mmio_gpio_set(codec, 0, false);
8449 dspio_set_uint_param(codec, 0x37, 0x08, tmp);
8450 dspio_set_uint_param(codec, 0x37, 0x10, tmp);
8454 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
8458 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
8459 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
8462 dspio_set_uint_param(codec, 0x32, 0x00, tmp);
8463 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);
8469 ca0132_alt_init_analog_mics(codec);
8471 ae7_post_dsp_asi_setup(codec);
8477 ca0113_mmio_gpio_set(codec, 0, true);
8478 ca0113_mmio_gpio_set(codec, 1, true);
8481 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x04);
8482 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x04);
8483 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x80);
8489 dspio_set_uint_param(codec,
8496 ca0132_alt_init_speaker_tuning(codec);
8502 static void ca0132_init_flags(struct hda_codec *codec)
8504 struct ca0132_spec *spec = codec->spec;
8507 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, 1);
8508 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, 1);
8509 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, 1);
8510 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, 1);
8511 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, 1);
8512 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);
8513 chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0);
8514 chipio_set_control_flag(codec,
8516 chipio_set_control_flag(codec,
8519 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);
8520 chipio_set_control_flag(codec,
8522 chipio_set_control_flag(codec,
8524 chipio_set_control_flag(codec,
8526 chipio_set_control_flag(codec,
8528 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_HIGH_PASS, 1);
8535 static void ca0132_init_params(struct hda_codec *codec)
8537 struct ca0132_spec *spec = codec->spec;
8540 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
8541 chipio_set_conn_rate(codec, 0x0B, SR_48_000);
8542 chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0);
8543 chipio_set_control_param(codec, 0, 0);
8544 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0);
8547 chipio_set_control_param(codec, CONTROL_PARAM_PORTA_160OHM_GAIN, 6);
8548 chipio_set_control_param(codec, CONTROL_PARAM_PORTD_160OHM_GAIN, 6);
8551 static void ca0132_set_dsp_msr(struct hda_codec *codec, bool is96k)
8553 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, is96k);
8554 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, is96k);
8555 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, is96k);
8556 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_CLOCK_196MHZ, is96k);
8557 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, is96k);
8558 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, is96k);
8560 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
8561 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
8562 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
8565 static bool ca0132_download_dsp_images(struct hda_codec *codec)
8568 struct ca0132_spec *spec = codec->spec;
8581 codec->card->dev) != 0)
8582 codec_dbg(codec, "Desktop firmware not found.");
8584 codec_dbg(codec, "Desktop firmware selected.");
8588 codec->card->dev) != 0)
8589 codec_dbg(codec, "Recon3Di alt firmware not detected.");
8591 codec_dbg(codec, "Recon3Di firmware selected.");
8598 * exists for your particular codec.
8601 codec_dbg(codec, "Default firmware selected.");
8603 codec->card->dev) != 0)
8608 if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) {
8609 codec_err(codec, "ca0132 DSP load image failed\n");
8613 dsp_loaded = dspload_wait_loaded(codec);
8621 static void ca0132_download_dsp(struct hda_codec *codec)
8623 struct ca0132_spec *spec = codec->spec;
8632 chipio_enable_clocks(codec);
8636 if (!ca0132_download_dsp_images(codec))
8644 ca0132_set_dsp_msr(codec, true);
8647 static void ca0132_process_dsp_response(struct hda_codec *codec,
8650 struct ca0132_spec *spec = codec->spec;
8652 codec_dbg(codec, "ca0132_process_dsp_response\n");
8653 snd_hda_power_up_pm(codec);
8655 if (dspio_get_response_data(codec) >= 0)
8659 dspio_clear_response_queue(codec);
8660 snd_hda_power_down_pm(codec);
8663 static void hp_callback(struct hda_codec *codec, struct hda_jack_callback *cb)
8665 struct ca0132_spec *spec = codec->spec;
8671 tbl = snd_hda_jack_tbl_get(codec, cb->nid);
8677 static void amic_callback(struct hda_codec *codec, struct hda_jack_callback *cb)
8679 struct ca0132_spec *spec = codec->spec;
8682 ca0132_alt_select_in(codec);
8684 ca0132_select_mic(codec);
8687 static void ca0132_setup_unsol(struct hda_codec *codec)
8689 struct ca0132_spec *spec = codec->spec;
8690 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_hp, hp_callback);
8691 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_amic1,
8693 snd_hda_jack_detect_enable_callback(codec, UNSOL_TAG_DSP,
8697 snd_hda_jack_detect_enable_callback(codec,
8776 static void ca0132_init_chip(struct hda_codec *codec)
8778 struct ca0132_spec *spec = codec->spec;
8792 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);
8793 chipio_write_no_mutex(codec, 0x18b0a4, 0x000000c2);
8795 snd_hda_codec_write(codec, codec->core.afg, 0,
8797 snd_hda_codec_write(codec, codec->core.afg, 0,
8853 ca0132_init_tuning_defaults(codec);
8861 static void r3di_gpio_shutdown(struct hda_codec *codec)
8863 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00);
8869 static void sbz_region2_exit(struct hda_codec *codec)
8871 struct ca0132_spec *spec = codec->spec;
8879 ca0113_mmio_gpio_set(codec, 0, false);
8880 ca0113_mmio_gpio_set(codec, 1, false);
8881 ca0113_mmio_gpio_set(codec, 4, true);
8882 ca0113_mmio_gpio_set(codec, 5, false);
8883 ca0113_mmio_gpio_set(codec, 7, false);
8886 static void sbz_set_pin_ctl_default(struct hda_codec *codec)
8891 snd_hda_codec_write(codec, 0x11, 0,
8895 snd_hda_codec_write(codec, pins[i], 0,
8899 static void ca0132_clear_unsolicited(struct hda_codec *codec)
8905 snd_hda_codec_write(codec, pins[i], 0,
8911 static void sbz_gpio_shutdown_commands(struct hda_codec *codec, int dir,
8915 snd_hda_codec_write(codec, 0x01, 0,
8918 snd_hda_codec_write(codec, 0x01, 0,
8922 snd_hda_codec_write(codec, 0x01, 0,
8926 static void zxr_dbpro_power_state_shutdown(struct hda_codec *codec)
8932 snd_hda_codec_write(codec, pins[i], 0,
8936 static void sbz_exit_chip(struct hda_codec *codec)
8938 chipio_set_stream_control(codec, 0x03, 0);
8939 chipio_set_stream_control(codec, 0x04, 0);
8942 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1);
8943 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05);
8944 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01);
8946 chipio_set_stream_control(codec, 0x14, 0);
8947 chipio_set_stream_control(codec, 0x0C, 0);
8949 chipio_set_conn_rate(codec, 0x41, SR_192_000);
8950 chipio_set_conn_rate(codec, 0x91, SR_192_000);
8952 chipio_write(codec, 0x18a020, 0x00000083);
8954 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03);
8955 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07);
8956 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06);
8958 chipio_set_stream_control(codec, 0x0C, 0);
8960 chipio_set_control_param(codec, 0x0D, 0x24);
8962 ca0132_clear_unsolicited(codec);
8963 sbz_set_pin_ctl_default(codec);
8965 snd_hda_codec_write(codec, 0x0B, 0,
8968 sbz_region2_exit(codec);
8971 static void r3d_exit_chip(struct hda_codec *codec)
8973 ca0132_clear_unsolicited(codec);
8974 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
8975 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5b);
8978 static void ae5_exit_chip(struct hda_codec *codec)
8980 chipio_set_stream_control(codec, 0x03, 0);
8981 chipio_set_stream_control(codec, 0x04, 0);
8983 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f);
8984 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);
8985 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);
8986 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00);
8987 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00);
8988 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x00);
8989 ca0113_mmio_gpio_set(codec, 0, false);
8990 ca0113_mmio_gpio_set(codec, 1, false);
8992 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
8993 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);
8995 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);
8997 chipio_set_stream_control(codec, 0x18, 0);
8998 chipio_set_stream_control(codec, 0x0c, 0);
9000 snd_hda_codec_write(codec, 0x01, 0, 0x724, 0x83);
9003 static void ae7_exit_chip(struct hda_codec *codec)
9005 chipio_set_stream_control(codec, 0x18, 0);
9006 chipio_set_stream_source_dest(codec, 0x21, 0xc8, 0xc8);
9007 chipio_set_stream_channels(codec, 0x21, 0);
9008 chipio_set_control_param(codec, CONTROL_PARAM_NODE_ID, 0x09);
9009 chipio_set_control_param(codec, 0x20, 0x01);
9011 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);
9013 chipio_set_stream_control(codec, 0x18, 0);
9014 chipio_set_stream_control(codec, 0x0c, 0);
9016 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00);
9017 snd_hda_codec_write(codec, 0x15, 0, 0x724, 0x83);
9018 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);
9019 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00);
9020 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x00);
9021 ca0113_mmio_gpio_set(codec, 0, false);
9022 ca0113_mmio_gpio_set(codec, 1, false);
9023 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f);
9025 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
9026 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);
9029 static void zxr_exit_chip(struct hda_codec *codec)
9031 chipio_set_stream_control(codec, 0x03, 0);
9032 chipio_set_stream_control(codec, 0x04, 0);
9033 chipio_set_stream_control(codec, 0x14, 0);
9034 chipio_set_stream_control(codec, 0x0C, 0);
9036 chipio_set_conn_rate(codec, 0x41, SR_192_000);
9037 chipio_set_conn_rate(codec, 0x91, SR_192_000);
9039 chipio_write(codec, 0x18a020, 0x00000083);
9041 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
9042 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);
9044 ca0132_clear_unsolicited(codec);
9045 sbz_set_pin_ctl_default(codec);
9046 snd_hda_codec_write(codec, 0x0B, 0, AC_VERB_SET_EAPD_BTLENABLE, 0x00);
9048 ca0113_mmio_gpio_set(codec, 5, false);
9049 ca0113_mmio_gpio_set(codec, 2, false);
9050 ca0113_mmio_gpio_set(codec, 3, false);
9051 ca0113_mmio_gpio_set(codec, 0, false);
9052 ca0113_mmio_gpio_set(codec, 4, true);
9053 ca0113_mmio_gpio_set(codec, 0, true);
9054 ca0113_mmio_gpio_set(codec, 5, true);
9055 ca0113_mmio_gpio_set(codec, 2, false);
9056 ca0113_mmio_gpio_set(codec, 3, false);
9059 static void ca0132_exit_chip(struct hda_codec *codec)
9063 if (dspload_is_loaded(codec))
9064 dsp_reset(codec);
9075 static void sbz_dsp_startup_check(struct hda_codec *codec)
9077 struct ca0132_spec *spec = codec->spec;
9090 chipio_read(codec, cur_address, &dsp_data_check[i]);
9098 codec_dbg(codec, "Startup Check: %d ", failure);
9100 codec_info(codec, "DSP not initialized properly. Attempting to fix.");
9107 codec_info(codec, "Reloading... Tries left: %d", reload);
9108 sbz_exit_chip(codec);
9110 codec->patch_ops.init(codec);
9113 chipio_read(codec, cur_address, &dsp_data_check[i]);
9124 codec_info(codec, "DSP fixed.");
9129 codec_info(codec, "DSP failed to initialize properly. Either try a full shutdown or a suspend to clear the internal memory.");
9140 static void ca0132_alt_vol_setup(struct hda_codec *codec)
9142 snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00);
9143 snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00);
9144 snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00);
9145 snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00);
9146 snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00);
9147 snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00);
9148 snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00);
9149 snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00);
9155 static void sbz_pre_dsp_setup(struct hda_codec *codec)
9157 struct ca0132_spec *spec = codec->spec;
9162 chipio_write(codec, 0x18b0a4, 0x000000c2);
9164 snd_hda_codec_write(codec, 0x11, 0,
9168 static void r3d_pre_dsp_setup(struct hda_codec *codec)
9170 chipio_write(codec, 0x18b0a4, 0x000000c2);
9172 chipio_8051_write_exram(codec, 0x1c1e, 0x5b);
9174 snd_hda_codec_write(codec, 0x11, 0,
9178 static void r3di_pre_dsp_setup(struct hda_codec *codec)
9180 chipio_write(codec, 0x18b0a4, 0x000000c2);
9182 chipio_8051_write_exram(codec, 0x1c1e, 0x5b);
9183 chipio_8051_write_exram(codec, 0x1920, 0x00);
9184 chipio_8051_write_exram(codec, 0x1921, 0x40);
9186 snd_hda_codec_write(codec, 0x11, 0,
9195 static void zxr_pre_dsp_setup(struct hda_codec *codec)
9201 chipio_write(codec, 0x189000, 0x0001f100);
9203 chipio_write(codec, 0x18900c, 0x0001f100);
9212 chipio_8051_write_exram(codec, 0xfa92, 0x22);
9214 chipio_8051_write_pll_pmu(codec, 0x51, 0x98);
9216 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x82);
9217 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 3);
9219 chipio_write(codec, 0x18902c, 0x00000000);
9221 chipio_write(codec, 0x18902c, 0x00000003);
9225 chipio_8051_write_pll_pmu(codec, addr[i], data[i]);
9268 static void ca0132_mmio_init_sbz(struct hda_codec *codec)
9270 struct ca0132_spec *spec = codec->spec;
9318 static void ca0132_mmio_init_ae5(struct hda_codec *codec)
9320 struct ca0132_spec *spec = codec->spec;
9350 static void ca0132_mmio_init(struct hda_codec *codec)
9352 struct ca0132_spec *spec = codec->spec;
9358 ca0132_mmio_init_sbz(codec);
9361 ca0132_mmio_init_ae5(codec);
9380 * eventually resets the codec with the 0x7ff verb. Not quite sure why it does
9383 static void ae5_register_set(struct hda_codec *codec)
9385 struct ca0132_spec *spec = codec->spec;
9393 chipio_8051_write_pll_pmu(codec, 0x41, 0xc8);
9395 chipio_8051_write_direct(codec, 0x93, 0x10);
9396 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2);
9424 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);
9425 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f);
9427 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f);
9430 chipio_8051_write_direct(codec, 0x90, 0x00);
9431 chipio_8051_write_direct(codec, 0x90, 0x10);
9434 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);
9442 static void ca0132_alt_init(struct hda_codec *codec)
9444 struct ca0132_spec *spec = codec->spec;
9446 ca0132_alt_vol_setup(codec);
9450 codec_dbg(codec, "SBZ alt_init");
9451 ca0132_gpio_init(codec);
9452 sbz_pre_dsp_setup(codec);
9453 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9454 snd_hda_sequence_write(codec, spec->desktop_init_verbs);
9457 codec_dbg(codec, "R3DI alt_init");
9458 ca0132_gpio_init(codec);
9459 ca0132_gpio_setup(codec);
9460 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADING);
9461 r3di_pre_dsp_setup(codec);
9462 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9463 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4);
9466 r3d_pre_dsp_setup(codec);
9467 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9468 snd_hda_sequence_write(codec, spec->desktop_init_verbs);
9471 ca0132_gpio_init(codec);
9472 chipio_8051_write_pll_pmu(codec, 0x49, 0x88);
9473 chipio_write(codec, 0x18b030, 0x00000020);
9474 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9475 snd_hda_sequence_write(codec, spec->desktop_init_verbs);
9476 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f);
9479 ca0132_gpio_init(codec);
9480 chipio_8051_write_pll_pmu(codec, 0x49, 0x88);
9481 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9482 snd_hda_sequence_write(codec, spec->desktop_init_verbs);
9483 chipio_write(codec, 0x18b008, 0x000000f8);
9484 chipio_write(codec, 0x18b008, 0x000000f0);
9485 chipio_write(codec, 0x18b030, 0x00000020);
9486 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f);
9489 chipio_8051_write_pll_pmu(codec, 0x49, 0x88);
9490 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9491 snd_hda_sequence_write(codec, spec->desktop_init_verbs);
9492 zxr_pre_dsp_setup(codec);
9499 static int ca0132_init(struct hda_codec *codec)
9501 struct ca0132_spec *spec = codec->spec;
9508 * there's only two reasons for it. One, the codec has awaken from a
9517 dsp_loaded = dspload_is_loaded(codec);
9523 sbz_dsp_startup_check(codec);
9533 ca0132_mmio_init(codec);
9535 snd_hda_power_up_pm(codec);
9538 ae5_register_set(codec);
9540 ca0132_init_params(codec);
9541 ca0132_init_flags(codec);
9543 snd_hda_sequence_write(codec, spec->base_init_verbs);
9546 ca0132_alt_init(codec);
9548 ca0132_download_dsp(codec);
9550 ca0132_refresh_widget_caps(codec);
9555 r3d_setup_defaults(codec);
9559 sbz_setup_defaults(codec);
9562 ae5_setup_defaults(codec);
9565 ae7_setup_defaults(codec);
9568 ca0132_setup_defaults(codec);
9569 ca0132_init_analog_mic2(codec);
9570 ca0132_init_dmic(codec);
9575 init_output(codec, spec->out_pins[i], spec->dacs[0]);
9577 init_output(codec, cfg->dig_out_pins[0], spec->dig_out);
9580 init_input(codec, spec->input_pins[i], spec->adcs[i]);
9582 init_input(codec, cfg->dig_in_pin, spec->dig_in);
9585 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9586 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9588 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9593 ca0132_gpio_setup(codec);
9595 snd_hda_sequence_write(codec, spec->spec_init_verbs);
9597 ca0132_alt_select_out(codec);
9598 ca0132_alt_select_in(codec);
9600 ca0132_select_out(codec);
9601 ca0132_select_mic(codec);
9604 snd_hda_jack_report_sync(codec);
9612 ca0132_pe_switch_set(codec);
9615 snd_hda_power_down_pm(codec);
9620 static int dbpro_init(struct hda_codec *codec)
9622 struct ca0132_spec *spec = codec->spec;
9626 init_output(codec, cfg->dig_out_pins[0], spec->dig_out);
9627 init_input(codec, cfg->dig_in_pin, spec->dig_in);
9630 init_input(codec, spec->input_pins[i], spec->adcs[i]);
9635 static void ca0132_free(struct hda_codec *codec)
9637 struct ca0132_spec *spec = codec->spec;
9640 snd_hda_power_up(codec);
9643 sbz_exit_chip(codec);
9646 zxr_exit_chip(codec);
9649 r3d_exit_chip(codec);
9652 ae5_exit_chip(codec);
9655 ae7_exit_chip(codec);
9658 r3di_gpio_shutdown(codec);
9664 snd_hda_sequence_write(codec, spec->base_exit_verbs);
9665 ca0132_exit_chip(codec);
9667 snd_hda_power_down(codec);
9670 pci_iounmap(codec->bus->pci, spec->mem_base);
9673 kfree(codec->spec);
9676 static void dbpro_free(struct hda_codec *codec)
9678 struct ca0132_spec *spec = codec->spec;
9680 zxr_dbpro_power_state_shutdown(codec);
9683 kfree(codec->spec);
9687 static int ca0132_suspend(struct hda_codec *codec)
9689 struct ca0132_spec *spec = codec->spec;
9714 static void ca0132_config(struct hda_codec *codec)
9716 struct ca0132_spec *spec = codec->spec;
9732 codec_dbg(codec, "%s: QUIRK_ALIENWARE applied.\n", __func__);
9733 snd_hda_apply_pincfgs(codec, alienware_pincfgs);
9736 codec_dbg(codec, "%s: QUIRK_SBZ applied.\n", __func__);
9737 snd_hda_apply_pincfgs(codec, sbz_pincfgs);
9740 codec_dbg(codec, "%s: QUIRK_ZXR applied.\n", __func__);
9741 snd_hda_apply_pincfgs(codec, zxr_pincfgs);
9744 codec_dbg(codec, "%s: QUIRK_R3D applied.\n", __func__);
9745 snd_hda_apply_pincfgs(codec, r3d_pincfgs);
9748 codec_dbg(codec, "%s: QUIRK_R3DI applied.\n", __func__);
9749 snd_hda_apply_pincfgs(codec, r3di_pincfgs);
9752 codec_dbg(codec, "%s: QUIRK_AE5 applied.\n", __func__);
9753 snd_hda_apply_pincfgs(codec, ae5_pincfgs);
9756 codec_dbg(codec, "%s: QUIRK_AE7 applied.\n", __func__);
9757 snd_hda_apply_pincfgs(codec, ae7_pincfgs);
9914 static int ca0132_prepare_verbs(struct hda_codec *codec)
9918 struct ca0132_spec *spec = codec->spec;
9959 * Sound Blaster Z cards. However, they have different HDA codec subsystem
9963 static void sbz_detect_quirk(struct hda_codec *codec)
9965 struct ca0132_spec *spec = codec->spec;
9967 switch (codec->core.subsystem_id) {
9980 static int patch_ca0132(struct hda_codec *codec)
9986 codec_dbg(codec, "patch_ca0132\n");
9991 codec->spec = spec;
9992 spec->codec = codec;
9994 /* Detect codec quirk */
9995 quirk = snd_pci_quirk_lookup(codec->bus->pci, ca0132_quirks);
10001 sbz_detect_quirk(codec);
10004 codec->patch_ops = dbpro_patch_ops;
10006 codec->patch_ops = ca0132_patch_ops;
10008 codec->pcm_format_first = 1;
10009 codec->no_sticky_stream = 1;
10019 snd_hda_codec_set_name(codec, "Sound Blaster Z");
10023 snd_hda_codec_set_name(codec, "Sound Blaster ZxR");
10029 snd_hda_codec_set_name(codec, "Recon3D");
10033 snd_hda_codec_set_name(codec, "Recon3Di");
10037 snd_hda_codec_set_name(codec, "Sound BlasterX AE-5");
10041 snd_hda_codec_set_name(codec, "Sound Blaster AE-7");
10073 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20);
10075 codec_warn(codec, "pci_iomap failed! Setting quirk to QUIRK_NONE.");
10086 ca0132_init_chip(codec);
10088 ca0132_config(codec);
10090 err = ca0132_prepare_verbs(codec);
10094 err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL);
10098 ca0132_setup_unsol(codec);
10103 ca0132_free(codec);
10117 MODULE_DESCRIPTION("Creative Sound Core3D codec");