Lines Matching refs:emu
19 static inline bool check_ptr_reg(struct snd_emu10k1 *emu, unsigned int reg)
21 if (snd_BUG_ON(!emu))
23 if (snd_BUG_ON(reg & (emu->audigy ? (0xffff0000 & ~A_PTR_ADDRESS_MASK)
31 unsigned int snd_emu10k1_ptr_read(struct snd_emu10k1 * emu, unsigned int reg, unsigned int chn)
38 if (!check_ptr_reg(emu, regptr))
41 spin_lock_irqsave(&emu->emu_lock, flags);
42 outl(regptr, emu->port + PTR);
43 val = inl(emu->port + DATA);
44 spin_unlock_irqrestore(&emu->emu_lock, flags);
61 void snd_emu10k1_ptr_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned int chn, unsigned int data)
68 if (!check_ptr_reg(emu, regptr))
82 spin_lock_irqsave(&emu->emu_lock, flags);
83 outl(regptr, emu->port + PTR);
84 data |= inl(emu->port + DATA) & ~mask;
86 spin_lock_irqsave(&emu->emu_lock, flags);
87 outl(regptr, emu->port + PTR);
89 outl(data, emu->port + DATA);
90 spin_unlock_irqrestore(&emu->emu_lock, flags);
95 void snd_emu10k1_ptr_write_multiple(struct snd_emu10k1 *emu, unsigned int chn, ...)
101 if (snd_BUG_ON(!emu))
105 addr_mask = ~((emu->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK) >> 16);
108 spin_lock_irqsave(&emu->emu_lock, flags);
117 outl((reg << 16) | chn, emu->port + PTR);
118 outl(data, emu->port + DATA);
120 spin_unlock_irqrestore(&emu->emu_lock, flags);
126 unsigned int snd_emu10k1_ptr20_read(struct snd_emu10k1 * emu,
135 spin_lock_irqsave(&emu->emu_lock, flags);
136 outl(regptr, emu->port + PTR2);
137 val = inl(emu->port + DATA2);
138 spin_unlock_irqrestore(&emu->emu_lock, flags);
142 void snd_emu10k1_ptr20_write(struct snd_emu10k1 *emu,
152 spin_lock_irqsave(&emu->emu_lock, flags);
153 outl(regptr, emu->port + PTR2);
154 outl(data, emu->port + DATA2);
155 spin_unlock_irqrestore(&emu->emu_lock, flags);
158 int snd_emu10k1_spi_write(struct snd_emu10k1 * emu,
167 spin_lock(&emu->spi_lock);
168 if (emu->card_capabilities->ca0108_chip)
182 tmp = snd_emu10k1_ptr20_read(emu, reg, 0);
185 snd_emu10k1_ptr20_write(emu, reg, 0, reset | data);
186 tmp = snd_emu10k1_ptr20_read(emu, reg, 0); /* write post */
187 snd_emu10k1_ptr20_write(emu, reg, 0, set | data);
192 tmp = snd_emu10k1_ptr20_read(emu, reg, 0);
203 snd_emu10k1_ptr20_write(emu, reg, 0, reset | data);
204 tmp = snd_emu10k1_ptr20_read(emu, reg, 0); /* Write post */
207 spin_unlock(&emu->spi_lock);
212 int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu,
223 dev_err(emu->card->dev, "i2c_write: invalid values.\n");
228 spin_lock(&emu->i2c_lock);
233 snd_emu10k1_ptr20_write(emu, P17V_I2C_1, 0, tmp);
234 tmp = snd_emu10k1_ptr20_read(emu, P17V_I2C_1, 0); /* write post */
240 snd_emu10k1_ptr20_write(emu, P17V_I2C_ADDR, 0, tmp);
245 status = snd_emu10k1_ptr20_read(emu, P17V_I2C_ADDR, 0);
251 dev_warn(emu->card->dev,
263 dev_err(emu->card->dev, "Writing to ADC failed!\n");
264 dev_err(emu->card->dev, "status=0x%x, reg=%d, value=%d\n",
270 spin_unlock(&emu->i2c_lock);
274 static void snd_emu1010_fpga_write_locked(struct snd_emu10k1 *emu, u32 reg, u32 value)
281 outw(reg, emu->port + A_GPIO);
283 outw(reg | 0x80, emu->port + A_GPIO); /* High bit clocks the value into the fpga. */
285 outw(value, emu->port + A_GPIO);
287 outw(value | 0x80 , emu->port + A_GPIO); /* High bit clocks the value into the fpga. */
290 void snd_emu1010_fpga_write(struct snd_emu10k1 *emu, u32 reg, u32 value)
294 spin_lock_irqsave(&emu->emu_lock, flags);
295 snd_emu1010_fpga_write_locked(emu, reg, value);
296 spin_unlock_irqrestore(&emu->emu_lock, flags);
299 static void snd_emu1010_fpga_read_locked(struct snd_emu10k1 *emu, u32 reg, u32 *value)
305 u32 mask = emu->card_capabilities->ca0108_chip ? 0x1f : 0x7f;
309 outw(reg, emu->port + A_GPIO);
311 outw(reg | 0x80, emu->port + A_GPIO); /* High bit clocks the value into the fpga. */
313 *value = ((inw(emu->port + A_GPIO) >> 8) & mask);
316 void snd_emu1010_fpga_read(struct snd_emu10k1 *emu, u32 reg, u32 *value)
320 spin_lock_irqsave(&emu->emu_lock, flags);
321 snd_emu1010_fpga_read_locked(emu, reg, value);
322 spin_unlock_irqrestore(&emu->emu_lock, flags);
328 void snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 *emu, u32 dst, u32 src)
336 spin_lock_irqsave(&emu->emu_lock, flags);
337 snd_emu1010_fpga_write_locked(emu, EMU_HANA_DESTHI, dst >> 8);
338 snd_emu1010_fpga_write_locked(emu, EMU_HANA_DESTLO, dst & 0x1f);
339 snd_emu1010_fpga_write_locked(emu, EMU_HANA_SRCHI, src >> 8);
340 snd_emu1010_fpga_write_locked(emu, EMU_HANA_SRCLO, src & 0x1f);
341 spin_unlock_irqrestore(&emu->emu_lock, flags);
344 u32 snd_emu1010_fpga_link_dst_src_read(struct snd_emu10k1 *emu, u32 dst)
351 spin_lock_irqsave(&emu->emu_lock, flags);
352 snd_emu1010_fpga_write_locked(emu, EMU_HANA_DESTHI, dst >> 8);
353 snd_emu1010_fpga_write_locked(emu, EMU_HANA_DESTLO, dst & 0x1f);
354 snd_emu1010_fpga_read_locked(emu, EMU_HANA_SRCHI, &hi);
355 snd_emu1010_fpga_read_locked(emu, EMU_HANA_SRCLO, &lo);
356 spin_unlock_irqrestore(&emu->emu_lock, flags);
360 int snd_emu1010_get_raw_rate(struct snd_emu10k1 *emu, u8 src)
366 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &value);
387 snd_emu1010_fpga_read(emu, reg_hi, &value);
388 snd_emu1010_fpga_read(emu, reg_lo, &value2);
393 void snd_emu1010_update_clock(struct snd_emu10k1 *emu)
398 switch (emu->emu1010.wclock) {
409 emu, emu->emu1010.wclock & EMU_HANA_WCLOCK_SRC_MASK);
423 emu->emu1010.word_clock = clock;
429 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, leds);
432 void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb)
437 spin_lock_irqsave(&emu->emu_lock, flags);
438 enable = inl(emu->port + INTE) | intrenb;
439 outl(enable, emu->port + INTE);
440 spin_unlock_irqrestore(&emu->emu_lock, flags);
443 void snd_emu10k1_intr_disable(struct snd_emu10k1 *emu, unsigned int intrenb)
448 spin_lock_irqsave(&emu->emu_lock, flags);
449 enable = inl(emu->port + INTE) & ~intrenb;
450 outl(enable, emu->port + INTE);
451 spin_unlock_irqrestore(&emu->emu_lock, flags);
454 void snd_emu10k1_voice_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenum)
459 spin_lock_irqsave(&emu->emu_lock, flags);
461 outl(CLIEH << 16, emu->port + PTR);
462 val = inl(emu->port + DATA);
465 outl(CLIEL << 16, emu->port + PTR);
466 val = inl(emu->port + DATA);
469 outl(val, emu->port + DATA);
470 spin_unlock_irqrestore(&emu->emu_lock, flags);
473 void snd_emu10k1_voice_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum)
478 spin_lock_irqsave(&emu->emu_lock, flags);
480 outl(CLIEH << 16, emu->port + PTR);
481 val = inl(emu->port + DATA);
484 outl(CLIEL << 16, emu->port + PTR);
485 val = inl(emu->port + DATA);
488 outl(val, emu->port + DATA);
489 spin_unlock_irqrestore(&emu->emu_lock, flags);
492 void snd_emu10k1_voice_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
496 spin_lock_irqsave(&emu->emu_lock, flags);
498 outl(CLIPH << 16, emu->port + PTR);
501 outl(CLIPL << 16, emu->port + PTR);
504 outl(voicenum, emu->port + DATA);
505 spin_unlock_irqrestore(&emu->emu_lock, flags);
508 void snd_emu10k1_voice_half_loop_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenum)
513 spin_lock_irqsave(&emu->emu_lock, flags);
515 outl(HLIEH << 16, emu->port + PTR);
516 val = inl(emu->port + DATA);
519 outl(HLIEL << 16, emu->port + PTR);
520 val = inl(emu->port + DATA);
523 outl(val, emu->port + DATA);
524 spin_unlock_irqrestore(&emu->emu_lock, flags);
527 void snd_emu10k1_voice_half_loop_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum)
532 spin_lock_irqsave(&emu->emu_lock, flags);
534 outl(HLIEH << 16, emu->port + PTR);
535 val = inl(emu->port + DATA);
538 outl(HLIEL << 16, emu->port + PTR);
539 val = inl(emu->port + DATA);
542 outl(val, emu->port + DATA);
543 spin_unlock_irqrestore(&emu->emu_lock, flags);
546 void snd_emu10k1_voice_half_loop_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
550 spin_lock_irqsave(&emu->emu_lock, flags);
552 outl(HLIPH << 16, emu->port + PTR);
555 outl(HLIPL << 16, emu->port + PTR);
558 outl(voicenum, emu->port + DATA);
559 spin_unlock_irqrestore(&emu->emu_lock, flags);
563 void snd_emu10k1_voice_set_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum)
568 spin_lock_irqsave(&emu->emu_lock, flags);
570 outl(SOLEH << 16, emu->port + PTR);
571 sol = inl(emu->port + DATA);
574 outl(SOLEL << 16, emu->port + PTR);
575 sol = inl(emu->port + DATA);
578 outl(sol, emu->port + DATA);
579 spin_unlock_irqrestore(&emu->emu_lock, flags);
582 void snd_emu10k1_voice_clear_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum)
587 spin_lock_irqsave(&emu->emu_lock, flags);
589 outl(SOLEH << 16, emu->port + PTR);
590 sol = inl(emu->port + DATA);
593 outl(SOLEL << 16, emu->port + PTR);
594 sol = inl(emu->port + DATA);
597 outl(sol, emu->port + DATA);
598 spin_unlock_irqrestore(&emu->emu_lock, flags);
602 void snd_emu10k1_voice_set_loop_stop_multiple(struct snd_emu10k1 *emu, u64 voices)
606 spin_lock_irqsave(&emu->emu_lock, flags);
607 outl(SOLEL << 16, emu->port + PTR);
608 outl(inl(emu->port + DATA) | (u32)voices, emu->port + DATA);
609 outl(SOLEH << 16, emu->port + PTR);
610 outl(inl(emu->port + DATA) | (u32)(voices >> 32), emu->port + DATA);
611 spin_unlock_irqrestore(&emu->emu_lock, flags);
614 void snd_emu10k1_voice_clear_loop_stop_multiple(struct snd_emu10k1 *emu, u64 voices)
618 spin_lock_irqsave(&emu->emu_lock, flags);
619 outl(SOLEL << 16, emu->port + PTR);
620 outl(inl(emu->port + DATA) & (u32)~voices, emu->port + DATA);
621 outl(SOLEH << 16, emu->port + PTR);
622 outl(inl(emu->port + DATA) & (u32)(~voices >> 32), emu->port + DATA);
623 spin_unlock_irqrestore(&emu->emu_lock, flags);
626 int snd_emu10k1_voice_clear_loop_stop_multiple_atomic(struct snd_emu10k1 *emu, u64 voices)
632 spin_lock_irqsave(&emu->emu_lock, flags);
634 outl(SOLEL << 16, emu->port + PTR);
635 soll = inl(emu->port + DATA);
636 outl(SOLEH << 16, emu->port + PTR);
637 solh = inl(emu->port + DATA);
645 u32 wc = inl(emu->port + WC);
649 outl(SOLEL << 16, emu->port + PTR);
650 outl(soll, emu->port + DATA);
653 cc = REG_VAL_GET(WC_CURRENTCHANNEL, inl(emu->port + WC));
663 outl(SOLEH << 16, emu->port + PTR);
664 outl(solh, emu->port + DATA);
666 if (REG_VAL_GET(WC_SAMPLECOUNTER, inl(emu->port + WC)) ==
675 spin_unlock_irqrestore(&emu->emu_lock, flags);
677 spin_lock_irqsave(&emu->emu_lock, flags);
680 spin_unlock_irqrestore(&emu->emu_lock, flags);
684 void snd_emu10k1_wait(struct snd_emu10k1 *emu, unsigned int wait)
689 curtime = inl(emu->port + WC) >> 6;
693 newtime = inl(emu->port + WC) >> 6;
705 struct snd_emu10k1 *emu = ac97->private_data;
709 spin_lock_irqsave(&emu->emu_lock, flags);
710 outb(reg, emu->port + AC97ADDRESS);
711 val = inw(emu->port + AC97DATA);
712 spin_unlock_irqrestore(&emu->emu_lock, flags);
718 struct snd_emu10k1 *emu = ac97->private_data;
721 spin_lock_irqsave(&emu->emu_lock, flags);
722 outb(reg, emu->port + AC97ADDRESS);
723 outw(data, emu->port + AC97DATA);
724 spin_unlock_irqrestore(&emu->emu_lock, flags);