Lines Matching defs:clock
33 static int set_input_clock(struct echoaudio *chip, u16 clock);
95 /* Map the DSP clock detect bits to the generic driver clock
150 48 kHz, internal clock, S/PDIF RCA mode */
169 /* Check the clock detect bits to see if this is
170 a single-speed clock or a double-speed clock; load
200 u32 control_reg, clock;
204 /* Only set the clock for internal mode. */
207 "Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");
245 clock = 0;
252 clock = GML_96KHZ;
255 clock = GML_88KHZ;
258 clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1;
261 clock = GML_44KHZ;
264 clock |= GML_SPDIF_SAMPLE_RATE0;
267 clock = GML_32KHZ | GML_SPDIF_SAMPLE_RATE0 |
271 clock = GML_22KHZ;
274 clock = GML_16KHZ;
277 clock = GML_11KHZ;
280 clock = GML_8KHZ;
288 control_reg |= clock;
293 "set_sample_rate: %d clock %d\n", rate, clock);
300 static int set_input_clock(struct echoaudio *chip, u16 clock)
305 /* Mask off the clock select bits */
310 switch (clock) {
343 dev_dbg(chip->card->dev, "Set Mona clock to ADAT\n");
351 "Input clock 0x%x not supported for Mona\n", clock);
355 chip->input_clock = clock;
366 /* Set clock to "internal" if it's not compatible with the new mode */