Lines Matching refs:chip
32 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
33 static int set_input_clock(struct echoaudio *chip, u16 clock);
34 static int set_professional_spdif(struct echoaudio *chip, char prof);
35 static int set_digital_mode(struct echoaudio *chip, u8 mode);
36 static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic);
37 static int check_asic_status(struct echoaudio *chip);
40 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
47 err = init_dsp_comm_page(chip);
49 dev_err(chip->card->dev,
54 chip->device_id = device_id;
55 chip->subdevice_id = subdevice_id;
56 chip->bad_board = true;
57 chip->input_clock_types =
63 if (chip->device_id == DEVICE_ID_56361) {
64 chip->dsp_code_to_load = FW_GINA24_361_DSP;
65 chip->digital_modes =
70 chip->dsp_code_to_load = FW_GINA24_301_DSP;
71 chip->digital_modes =
78 err = load_firmware(chip);
81 chip->bad_board = false;
88 static int set_mixer_defaults(struct echoaudio *chip)
90 chip->digital_mode = DIGITAL_MODE_SPDIF_RCA;
91 chip->professional_spdif = false;
92 chip->digital_in_automute = true;
93 return init_line_levels(chip);
98 static u32 detect_input_clocks(const struct echoaudio *chip)
104 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
124 static int load_asic(struct echoaudio *chip)
130 if (chip->asic_loaded)
137 if (chip->device_id == DEVICE_ID_56361)
142 err = load_asic_generic(chip, DSP_FNC_LOAD_GINA24_ASIC, asic);
146 chip->asic_code = asic;
151 err = check_asic_status(chip);
157 err = write_control_reg(chip, control_reg, true);
164 static int set_sample_rate(struct echoaudio *chip, u32 rate)
169 chip->digital_mode == DIGITAL_MODE_ADAT))
173 if (chip->input_clock != ECHO_CLOCK_INTERNAL) {
174 dev_warn(chip->card->dev,
177 chip->comm_page->sample_rate = cpu_to_le32(rate);
178 chip->sample_rate = rate;
184 control_reg = le32_to_cpu(chip->comm_page->control_register);
220 dev_err(chip->card->dev,
227 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */
228 chip->sample_rate = rate;
229 dev_dbg(chip->card->dev, "set_sample_rate: %d clock %d\n", rate, clock);
231 return write_control_reg(chip, control_reg, false);
236 static int set_input_clock(struct echoaudio *chip, u16 clock)
242 control_reg = le32_to_cpu(chip->comm_page->control_register) &
244 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
248 chip->input_clock = ECHO_CLOCK_INTERNAL;
249 return set_sample_rate(chip, chip->sample_rate);
251 if (chip->digital_mode == DIGITAL_MODE_ADAT)
260 if (chip->digital_mode != DIGITAL_MODE_ADAT)
273 dev_err(chip->card->dev,
278 chip->input_clock = clock;
279 return write_control_reg(chip, control_reg, true);
284 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode)
295 if (chip->input_clock == ECHO_CLOCK_ADAT)
299 if (chip->input_clock == ECHO_CLOCK_SPDIF)
303 dev_err(chip->card->dev,
308 spin_lock_irq(&chip->lock);
311 chip->sample_rate = 48000;
312 set_input_clock(chip, ECHO_CLOCK_INTERNAL);
316 control_reg = le32_to_cpu(chip->comm_page->control_register);
326 if (chip->device_id == DEVICE_ID_56301)
338 err = write_control_reg(chip, control_reg, true);
339 spin_unlock_irq(&chip->lock);
342 chip->digital_mode = mode;
344 dev_dbg(chip->card->dev,
345 "set_digital_mode to %d\n", chip->digital_mode);