Lines Matching defs:val

532 	unsigned int val, oval;
533 val = oval = inl(cm->iobase + cmd);
534 val |= flag;
535 if (val == oval)
537 outl(val, cm->iobase + cmd);
543 unsigned int val, oval;
544 val = oval = inl(cm->iobase + cmd);
545 val &= ~flag;
546 if (val == oval)
548 outl(val, cm->iobase + cmd);
555 unsigned char val, oval;
556 val = oval = inb(cm->iobase + cmd);
557 val |= flag;
558 if (val == oval)
560 outb(val, cm->iobase + cmd);
566 unsigned char val, oval;
567 val = oval = inb(cm->iobase + cmd);
568 val &= ~flag;
569 if (val == oval)
571 outb(val, cm->iobase + cmd);
756 unsigned int reg, freq, freq_ext, val;
795 val = rec->ch ? CM_CHADC1 : CM_CHADC0;
797 cm->ctrl &= ~val;
799 cm->ctrl |= val;
815 val = snd_cmipci_read(cm, CM_REG_FUNCTRL1);
817 val &= ~CM_DSFC_MASK;
818 val |= (freq << CM_DSFC_SHIFT) & CM_DSFC_MASK;
820 val &= ~CM_ASFC_MASK;
821 val |= (freq << CM_ASFC_SHIFT) & CM_ASFC_MASK;
823 snd_cmipci_write(cm, CM_REG_FUNCTRL1, val);
824 dev_dbg(cm->card->dev, "functrl1 = %08x\n", val);
827 val = snd_cmipci_read(cm, CM_REG_CHFORMAT);
829 val &= ~CM_CH1FMT_MASK;
830 val |= rec->fmt << CM_CH1FMT_SHIFT;
832 val &= ~CM_CH0FMT_MASK;
833 val |= rec->fmt << CM_CH0FMT_SHIFT;
836 val &= ~(CM_CH0_SRATE_MASK << (rec->ch * 2));
837 val |= freq_ext << (rec->ch * 2);
839 snd_cmipci_write(cm, CM_REG_CHFORMAT, val);
840 dev_dbg(cm->card->dev, "chformat = %08x\n", val);
1007 unsigned int val;
1009 val = 0;
1012 val |= (unsigned int)ucontrol->value.iec958.status[i] << (i * 8);
1013 change = val != chip->dig_status;
1014 chip->dig_status = val;
1081 unsigned int val;
1083 val = 0;
1086 val |= (unsigned int)ucontrol->value.iec958.status[i] << (i * 8);
1087 change = val != chip->dig_pcm_status;
1088 chip->dig_pcm_status = val;
1110 struct snd_ctl_elem_value *val;
1113 val = kmalloc(sizeof(*val), GFP_KERNEL);
1114 if (!val)
1120 memset(val, 0, sizeof(*val));
1121 ctl->get(ctl, val);
1122 cm->mixer_res_status[i] = val->value.integer.value[0];
1123 val->value.integer.value[0] = cm_saved_mixer[i].toggle_on;
1125 if (cm->mixer_res_status[i] != val->value.integer.value[0]) {
1126 ctl->put(ctl, val); /* toggle */
1133 kfree(val);
1144 struct snd_ctl_elem_value *val;
1147 val = kmalloc(sizeof(*val), GFP_KERNEL);
1148 if (!val)
1157 memset(val, 0, sizeof(*val));
1159 ctl->get(ctl, val);
1161 if (val->value.integer.value[0] != cm->mixer_res_status[i]) {
1162 val->value.integer.value[0] = cm->mixer_res_status[i];
1163 ctl->put(ctl, val);
1169 kfree(val);
1313 unsigned int reg, val;
1319 val = ((PAGE_SIZE / 4) - 1) | (((PAGE_SIZE / 4) / 2 - 1) << 16);
1320 snd_cmipci_write(cm, reg, val);
1326 val = snd_cmipci_read(cm, CM_REG_FUNCTRL1);
1327 val &= ~(CM_ASFC_MASK << (rec->ch * 3));
1328 val |= (4 << CM_ASFC_SHIFT) << (rec->ch * 3);
1329 snd_cmipci_write(cm, CM_REG_FUNCTRL1, val);
1330 val = snd_cmipci_read(cm, CM_REG_CHFORMAT);
1331 val &= ~(CM_CH0FMT_MASK << (rec->ch * 2));
1332 val |= (3 << CM_CH0FMT_SHIFT) << (rec->ch * 2);
1334 val &= ~(CM_CH0_SRATE_MASK << (rec->ch * 2));
1335 snd_cmipci_write(cm, CM_REG_CHFORMAT, val);
1347 val = CM_RST_CH0 << rec->ch;
1348 snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl | val);
1349 snd_cmipci_write(cm, CM_REG_FUNCTRL0, cm->ctrl & ~val);
1997 static void cmipci_sb_reg_decode(struct cmipci_sb_reg *r, unsigned long val)
1999 r->left_reg = val & 0xff;
2000 r->right_reg = (val >> 8) & 0xff;
2001 r->left_shift = (val >> 16) & 0x07;
2002 r->right_shift = (val >> 19) & 0x07;
2003 r->invert = (val >> 22) & 1;
2004 r->stereo = (val >> 23) & 1;
2005 r->mask = (val >> 24) & 0xff;
2026 int val;
2030 val = (snd_cmipci_mixer_read(cm, reg.left_reg) >> reg.left_shift) & reg.mask;
2032 val = reg.mask - val;
2033 ucontrol->value.integer.value[0] = val;
2035 val = (snd_cmipci_mixer_read(cm, reg.right_reg) >> reg.right_shift) & reg.mask;
2037 val = reg.mask - val;
2038 ucontrol->value.integer.value[1] = val;
2198 unsigned char oreg, val;
2203 val = (oreg >> reg.left_shift) & reg.mask;
2205 val = reg.mask - val;
2206 ucontrol->value.integer.value[0] = val;
2208 val = (oreg >> reg.right_shift) & reg.mask;
2210 val = reg.mask - val;
2211 ucontrol->value.integer.value[1] = val;
2222 unsigned char oreg, nreg, val;
2227 val = ucontrol->value.integer.value[0] & reg.mask;
2229 val = reg.mask - val;
2231 nreg |= (val << reg.left_shift);
2233 val = ucontrol->value.integer.value[1] & reg.mask;
2235 val = reg.mask - val;
2237 nreg |= (val << reg.right_shift);
2324 unsigned int val;
2334 val = inb(cm->iobase + args->reg);
2336 val = snd_cmipci_read(cm, args->reg);
2337 ucontrol->value.integer.value[0] = ((val & args->mask) == args->mask_on) ? 1 : 0;
2356 unsigned int val;
2367 val = inb(cm->iobase + args->reg);
2369 val = snd_cmipci_read(cm, args->reg);
2370 change = (val & args->mask) != (ucontrol->value.integer.value[0] ?
2373 val &= ~args->mask;
2375 val |= args->mask_on;
2377 val |= (args->mask & ~args->mask_on);
2379 outb((unsigned char)val, cm->iobase + args->reg);
2381 snd_cmipci_write(cm, args->reg, val);
2499 unsigned int val;
2501 val = snd_cmipci_read(cm, CM_REG_LEGACY_CTRL);
2502 if (val & (CM_CENTR2LIN | CM_BASE2LIN))
2505 val = snd_cmipci_read_b(cm, CM_REG_MIXER1);
2506 if (val & CM_REAR2LIN)
2918 unsigned int val;
2935 val = snd_cmipci_read(cm, CM_REG_LEGACY_CTRL) & ~CM_FMSEL_MASK;
2938 case 0x3E8: val |= CM_FMSEL_3E8; break;
2939 case 0x3E0: val |= CM_FMSEL_3E0; break;
2940 case 0x3C8: val |= CM_FMSEL_3C8; break;
2941 case 0x388: val |= CM_FMSEL_388; break;
2945 snd_cmipci_write(cm, CM_REG_LEGACY_CTRL, val);
2975 unsigned int val;
3077 val = pci->device < 0x110 ? 8338 : 8738;
3081 val = 8769;
3084 val = 8762;
3095 val = 8770;
3098 val = 8768;
3103 sprintf(card->shortname, "C-Media CMI%d", val);
3114 val = snd_cmipci_read_b(cm, CM_REG_MPU_PCI + 1);
3115 if (val != 0x00 && val != 0xff) {
3122 val = 0;
3125 case 0x320: val = CM_VMPU_320; break;
3126 case 0x310: val = CM_VMPU_310; break;
3127 case 0x300: val = CM_VMPU_300; break;
3128 case 0x330: val = CM_VMPU_330; break;
3133 snd_cmipci_write(cm, CM_REG_LEGACY_CTRL, val);
3193 for (val = 0; val < ARRAY_SIZE(rates); val++)
3194 snd_cmipci_set_pll(cm, rates[val], val);