Lines Matching refs:chip
97 ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
99 return readw(chip->iobase + reg);
103 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
105 writew(val, chip->iobase + reg);
109 ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
111 return readl(chip->iobase + reg);
115 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
117 writel(val, chip->iobase + reg);
121 ad1889_unmute(struct snd_ad1889 *chip)
124 st = ad1889_readw(chip, AD_DS_WADA) &
126 ad1889_writew(chip, AD_DS_WADA, st);
127 ad1889_readw(chip, AD_DS_WADA);
131 ad1889_mute(struct snd_ad1889 *chip)
134 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
135 ad1889_writew(chip, AD_DS_WADA, st);
136 ad1889_readw(chip, AD_DS_WADA);
140 ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
142 ad1889_writel(chip, AD_DMA_ADCBA, address);
143 ad1889_writel(chip, AD_DMA_ADCCA, address);
147 ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
149 ad1889_writel(chip, AD_DMA_ADCBC, count);
150 ad1889_writel(chip, AD_DMA_ADCCC, count);
154 ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
156 ad1889_writel(chip, AD_DMA_ADCIB, count);
157 ad1889_writel(chip, AD_DMA_ADCIC, count);
161 ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
163 ad1889_writel(chip, AD_DMA_WAVBA, address);
164 ad1889_writel(chip, AD_DMA_WAVCA, address);
168 ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
170 ad1889_writel(chip, AD_DMA_WAVBC, count);
171 ad1889_writel(chip, AD_DMA_WAVCC, count);
175 ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
177 ad1889_writel(chip, AD_DMA_WAVIB, count);
178 ad1889_writel(chip, AD_DMA_WAVIC, count);
182 ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
188 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
189 ad1889_writew(chip, AD_DS_WSMC, reg);
190 chip->wave.reg = reg;
193 reg = ad1889_readw(chip, AD_DMA_WAV);
196 ad1889_writew(chip, AD_DMA_WAV, reg);
199 ad1889_load_wave_buffer_address(chip, 0x0);
200 ad1889_load_wave_buffer_count(chip, 0x0);
201 ad1889_load_wave_interrupt_count(chip, 0x0);
204 ad1889_readw(chip, AD_DMA_WAV);
209 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
210 ad1889_writew(chip, AD_DS_RAMC, reg);
211 chip->ramc.reg = reg;
213 reg = ad1889_readw(chip, AD_DMA_ADC);
216 ad1889_writew(chip, AD_DMA_ADC, reg);
218 ad1889_load_adc_buffer_address(chip, 0x0);
219 ad1889_load_adc_buffer_count(chip, 0x0);
220 ad1889_load_adc_interrupt_count(chip, 0x0);
223 ad1889_readw(chip, AD_DMA_ADC);
230 struct snd_ad1889 *chip = ac97->private_data;
231 return ad1889_readw(chip, AD_AC97_BASE + reg);
237 struct snd_ad1889 *chip = ac97->private_data;
238 ad1889_writew(chip, AD_AC97_BASE + reg, val);
242 snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
246 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
250 dev_err(chip->card->dev, "[%s] Link is not ready.\n",
254 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry);
296 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
299 chip->psubs = ss;
308 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
311 chip->csubs = ss;
320 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
321 chip->psubs = NULL;
328 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
329 chip->csubs = NULL;
336 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
342 ad1889_channel_reset(chip, AD_CHAN_WAV);
344 reg = ad1889_readw(chip, AD_DS_WSMC);
356 spin_lock_irq(&chip->lock);
358 chip->wave.size = size;
359 chip->wave.reg = reg;
360 chip->wave.addr = rt->dma_addr;
362 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
365 ad1889_writew(chip, AD_DS_WAS, rt->rate);
368 ad1889_load_wave_buffer_address(chip, chip->wave.addr);
369 ad1889_load_wave_buffer_count(chip, size);
370 ad1889_load_wave_interrupt_count(chip, count);
373 ad1889_readw(chip, AD_DS_WSMC);
375 spin_unlock_irq(&chip->lock);
377 dev_dbg(chip->card->dev,
379 chip->wave.addr, count, size, reg, rt->rate);
386 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
392 ad1889_channel_reset(chip, AD_CHAN_ADC);
394 reg = ad1889_readw(chip, AD_DS_RAMC);
406 spin_lock_irq(&chip->lock);
408 chip->ramc.size = size;
409 chip->ramc.reg = reg;
410 chip->ramc.addr = rt->dma_addr;
412 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
415 ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
416 ad1889_load_adc_buffer_count(chip, size);
417 ad1889_load_adc_interrupt_count(chip, count);
420 ad1889_readw(chip, AD_DS_RAMC);
422 spin_unlock_irq(&chip->lock);
424 dev_dbg(chip->card->dev,
426 chip->ramc.addr, count, size, reg, rt->rate);
438 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
440 wsmc = ad1889_readw(chip, AD_DS_WSMC);
445 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
448 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
449 ad1889_unmute(chip);
452 ad1889_mute(chip);
460 chip->wave.reg = wsmc;
461 ad1889_writew(chip, AD_DS_WSMC, wsmc);
462 ad1889_readw(chip, AD_DS_WSMC); /* flush */
464 /* reset the chip when STOP - will disable IRQs */
466 ad1889_channel_reset(chip, AD_CHAN_WAV);
479 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
481 ramc = ad1889_readw(chip, AD_DS_RAMC);
486 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
489 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
498 chip->ramc.reg = ramc;
499 ad1889_writew(chip, AD_DS_RAMC, ramc);
500 ad1889_readw(chip, AD_DS_RAMC); /* flush */
502 /* reset the chip when STOP - will disable IRQs */
504 ad1889_channel_reset(chip, AD_CHAN_ADC);
514 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
516 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
519 ptr = ad1889_readl(chip, AD_DMA_WAVCA);
520 ptr -= chip->wave.addr;
522 if (snd_BUG_ON(ptr >= chip->wave.size))
533 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
535 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
538 ptr = ad1889_readl(chip, AD_DMA_ADCCA);
539 ptr -= chip->ramc.addr;
541 if (snd_BUG_ON(ptr >= chip->ramc.size))
567 struct snd_ad1889 *chip = dev_id;
569 st = ad1889_readl(chip, AD_DMA_DISR);
572 ad1889_writel(chip, AD_DMA_DISR, st);
580 dev_dbg(chip->card->dev,
583 if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
584 snd_pcm_period_elapsed(chip->psubs);
585 if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
586 snd_pcm_period_elapsed(chip->csubs);
592 snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device)
597 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
606 pcm->private_data = chip;
608 strcpy(pcm->name, chip->card->shortname);
610 chip->pcm = pcm;
611 chip->psubs = NULL;
612 chip->csubs = NULL;
614 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
623 struct snd_ad1889 *chip = entry->private_data;
627 reg = ad1889_readw(chip, AD_DS_WSMC);
655 reg = ad1889_readw(chip, AD_DS_RAMC);
686 reg = ad1889_readw(chip, AD_DS_WADA);
690 reg = ad1889_readw(chip, AD_DS_WADA);
695 reg = ad1889_readw(chip, AD_DS_WAS);
697 reg = ad1889_readw(chip, AD_DS_RES);
702 snd_ad1889_proc_init(struct snd_ad1889 *chip)
704 snd_card_ro_proc_new(chip->card, chip->card->driver,
705 chip, snd_ad1889_proc_read);
720 snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
724 reg = ad1889_readw(chip, AD_AC97_ACIC);
726 ad1889_writew(chip, AD_AC97_ACIC, reg);
727 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
731 ad1889_writew(chip, AD_AC97_ACIC, reg);
733 snd_ad1889_ac97_ready(chip);
736 reg = ad1889_readw(chip, AD_AC97_ACIC);
738 ad1889_writew(chip, AD_AC97_ACIC, reg);
739 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
744 snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
754 snd_ad1889_ac97_xinit(chip);
756 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
761 ac97.private_data = chip;
762 ac97.pci = chip->pci;
764 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
768 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
776 struct snd_ad1889 *chip = card->private_data;
778 spin_lock_irq(&chip->lock);
780 ad1889_mute(chip);
783 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
786 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
787 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
789 spin_unlock_irq(&chip->lock);
795 struct snd_ad1889 *chip = card->private_data;
808 chip->card = card;
809 chip->pci = pci;
810 chip->irq = -1;
817 chip->bar = pci_resource_start(pci, 0);
818 chip->iobase = pcim_iomap_table(pci)[0];
822 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
825 IRQF_SHARED, KBUILD_MODNAME, chip)) {
830 chip->irq = pci->irq;
831 card->sync_irq = chip->irq;
834 /* (2) initialization of the chip hardware */
835 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
836 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
841 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
853 struct snd_ad1889 *chip;
865 sizeof(*chip), &card);
868 chip = card->private_data;
880 card->shortname, chip->bar, chip->irq);
884 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
888 err = snd_ad1889_pcm_init(chip, 0);
893 snd_ad1889_proc_init(chip);