Lines Matching refs:chip
8 * Yamaha OPL3-SA3 chip
151 static inline void wss_outb(struct snd_wss *chip, u8 offset, u8 val)
153 outb(val, chip->port + offset);
156 static inline u8 wss_inb(struct snd_wss *chip, u8 offset)
158 return inb(chip->port + offset);
161 static void snd_wss_wait(struct snd_wss *chip)
166 timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
171 static void snd_wss_dout(struct snd_wss *chip, unsigned char reg,
177 timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
180 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
181 wss_outb(chip, CS4231P(REG), value);
185 void snd_wss_out(struct snd_wss *chip, unsigned char reg, unsigned char value)
187 snd_wss_wait(chip);
189 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
193 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
194 wss_outb(chip, CS4231P(REG), value);
195 chip->image[reg] = value;
198 chip->mce_bit | reg, value);
202 unsigned char snd_wss_in(struct snd_wss *chip, unsigned char reg)
204 snd_wss_wait(chip);
206 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
210 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
212 return wss_inb(chip, CS4231P(REG));
216 void snd_cs4236_ext_out(struct snd_wss *chip, unsigned char reg,
219 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
220 wss_outb(chip, CS4231P(REG),
221 reg | (chip->image[CS4236_EXT_REG] & 0x01));
222 wss_outb(chip, CS4231P(REG), val);
223 chip->eimage[CS4236_REG(reg)] = val;
230 unsigned char snd_cs4236_ext_in(struct snd_wss *chip, unsigned char reg)
232 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
233 wss_outb(chip, CS4231P(REG),
234 reg | (chip->image[CS4236_EXT_REG] & 0x01));
236 return wss_inb(chip, CS4231P(REG));
240 res = wss_inb(chip, CS4231P(REG));
251 static void snd_wss_debug(struct snd_wss *chip)
256 wss_inb(chip, CS4231P(REGSEL)),
257 wss_inb(chip, CS4231P(STATUS)));
261 snd_wss_in(chip, 0x00),
262 snd_wss_in(chip, 0x10));
266 snd_wss_in(chip, 0x01),
267 snd_wss_in(chip, 0x11));
271 snd_wss_in(chip, 0x02),
272 snd_wss_in(chip, 0x12));
276 snd_wss_in(chip, 0x03),
277 snd_wss_in(chip, 0x13));
281 snd_wss_in(chip, 0x04),
282 snd_wss_in(chip, 0x14));
286 snd_wss_in(chip, 0x05),
287 snd_wss_in(chip, 0x15));
291 snd_wss_in(chip, 0x06),
292 snd_wss_in(chip, 0x16));
296 snd_wss_in(chip, 0x07),
297 snd_wss_in(chip, 0x17));
301 snd_wss_in(chip, 0x08),
302 snd_wss_in(chip, 0x18));
306 snd_wss_in(chip, 0x09),
307 snd_wss_in(chip, 0x19));
311 snd_wss_in(chip, 0x0a),
312 snd_wss_in(chip, 0x1a));
316 snd_wss_in(chip, 0x0b),
317 snd_wss_in(chip, 0x1b));
321 snd_wss_in(chip, 0x0c),
322 snd_wss_in(chip, 0x1c));
326 snd_wss_in(chip, 0x0d),
327 snd_wss_in(chip, 0x1d));
331 snd_wss_in(chip, 0x0e),
332 snd_wss_in(chip, 0x1e));
336 snd_wss_in(chip, 0x0f),
337 snd_wss_in(chip, 0x1f));
346 static void snd_wss_busy_wait(struct snd_wss *chip)
350 /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
352 wss_inb(chip, CS4231P(REGSEL));
355 timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
360 void snd_wss_mce_up(struct snd_wss *chip)
365 snd_wss_wait(chip);
367 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
371 spin_lock_irqsave(&chip->reg_lock, flags);
372 chip->mce_bit |= CS4231_MCE;
373 timeout = wss_inb(chip, CS4231P(REGSEL));
377 chip->port);
379 wss_outb(chip, CS4231P(REGSEL),
380 chip->mce_bit | (timeout & 0x1f));
381 spin_unlock_irqrestore(&chip->reg_lock, flags);
385 void snd_wss_mce_down(struct snd_wss *chip)
392 snd_wss_busy_wait(chip);
395 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
400 spin_lock_irqsave(&chip->reg_lock, flags);
401 chip->mce_bit &= ~CS4231_MCE;
402 timeout = wss_inb(chip, CS4231P(REGSEL));
403 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
404 spin_unlock_irqrestore(&chip->reg_lock, flags);
408 chip->port);
409 if ((timeout & CS4231_MCE) == 0 || !(chip->hardware & hw_mask))
423 while (snd_wss_in(chip, CS4231_TEST_INIT) &
438 while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
447 snd_printd("mce_down - exit = 0x%x\n", wss_inb(chip, CS4231P(REGSEL)));
469 struct snd_wss *chip = snd_pcm_substream_chip(substream);
488 if (s == chip->playback_substream) {
491 } else if (s == chip->capture_substream) {
496 spin_lock(&chip->reg_lock);
498 chip->image[CS4231_IFACE_CTRL] |= what;
499 if (chip->trigger)
500 chip->trigger(chip, what, 1);
502 chip->image[CS4231_IFACE_CTRL] &= ~what;
503 if (chip->trigger)
504 chip->trigger(chip, what, 0);
506 snd_wss_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
507 spin_unlock(&chip->reg_lock);
509 snd_wss_debug(chip);
529 static unsigned char snd_wss_get_format(struct snd_wss *chip,
551 static void snd_wss_calibrate_mute(struct snd_wss *chip, int mute)
556 spin_lock_irqsave(&chip->reg_lock, flags);
557 if (chip->calibrate_mute == mute) {
558 spin_unlock_irqrestore(&chip->reg_lock, flags);
562 snd_wss_dout(chip, CS4231_LEFT_INPUT,
563 chip->image[CS4231_LEFT_INPUT]);
564 snd_wss_dout(chip, CS4231_RIGHT_INPUT,
565 chip->image[CS4231_RIGHT_INPUT]);
566 snd_wss_dout(chip, CS4231_LOOPBACK,
567 chip->image[CS4231_LOOPBACK]);
569 snd_wss_dout(chip, CS4231_LEFT_INPUT,
571 snd_wss_dout(chip, CS4231_RIGHT_INPUT,
573 snd_wss_dout(chip, CS4231_LOOPBACK,
577 snd_wss_dout(chip, CS4231_AUX1_LEFT_INPUT,
578 mute | chip->image[CS4231_AUX1_LEFT_INPUT]);
579 snd_wss_dout(chip, CS4231_AUX1_RIGHT_INPUT,
580 mute | chip->image[CS4231_AUX1_RIGHT_INPUT]);
581 snd_wss_dout(chip, CS4231_AUX2_LEFT_INPUT,
582 mute | chip->image[CS4231_AUX2_LEFT_INPUT]);
583 snd_wss_dout(chip, CS4231_AUX2_RIGHT_INPUT,
584 mute | chip->image[CS4231_AUX2_RIGHT_INPUT]);
585 snd_wss_dout(chip, CS4231_LEFT_OUTPUT,
586 mute | chip->image[CS4231_LEFT_OUTPUT]);
587 snd_wss_dout(chip, CS4231_RIGHT_OUTPUT,
588 mute | chip->image[CS4231_RIGHT_OUTPUT]);
589 if (!(chip->hardware & WSS_HW_AD1848_MASK)) {
590 snd_wss_dout(chip, CS4231_LEFT_LINE_IN,
591 mute | chip->image[CS4231_LEFT_LINE_IN]);
592 snd_wss_dout(chip, CS4231_RIGHT_LINE_IN,
593 mute | chip->image[CS4231_RIGHT_LINE_IN]);
594 snd_wss_dout(chip, CS4231_MONO_CTRL,
595 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
597 if (chip->hardware == WSS_HW_INTERWAVE) {
598 snd_wss_dout(chip, CS4231_LEFT_MIC_INPUT,
599 mute | chip->image[CS4231_LEFT_MIC_INPUT]);
600 snd_wss_dout(chip, CS4231_RIGHT_MIC_INPUT,
601 mute | chip->image[CS4231_RIGHT_MIC_INPUT]);
602 snd_wss_dout(chip, CS4231_LINE_LEFT_OUTPUT,
603 mute | chip->image[CS4231_LINE_LEFT_OUTPUT]);
604 snd_wss_dout(chip, CS4231_LINE_RIGHT_OUTPUT,
605 mute | chip->image[CS4231_LINE_RIGHT_OUTPUT]);
607 chip->calibrate_mute = mute;
608 spin_unlock_irqrestore(&chip->reg_lock, flags);
611 static void snd_wss_playback_format(struct snd_wss *chip,
618 mutex_lock(&chip->mce_mutex);
619 if (chip->hardware == WSS_HW_CS4231A ||
620 (chip->hardware & WSS_HW_CS4232_MASK)) {
621 spin_lock_irqsave(&chip->reg_lock, flags);
622 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (pdfr & 0x0f)) { /* rate is same? */
623 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
624 chip->image[CS4231_ALT_FEATURE_1] | 0x10);
625 chip->image[CS4231_PLAYBK_FORMAT] = pdfr;
626 snd_wss_out(chip, CS4231_PLAYBK_FORMAT,
627 chip->image[CS4231_PLAYBK_FORMAT]);
628 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
629 chip->image[CS4231_ALT_FEATURE_1] &= ~0x10);
633 spin_unlock_irqrestore(&chip->reg_lock, flags);
634 } else if (chip->hardware == WSS_HW_AD1845) {
646 spin_lock_irqsave(&chip->reg_lock, flags);
647 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, (pdfr & 0xf0));
648 snd_wss_out(chip, AD1845_UPR_FREQ_SEL, (rate >> 8) & 0xff);
649 snd_wss_out(chip, AD1845_LWR_FREQ_SEL, rate & 0xff);
651 spin_unlock_irqrestore(&chip->reg_lock, flags);
654 snd_wss_mce_up(chip);
655 spin_lock_irqsave(&chip->reg_lock, flags);
656 if (chip->hardware != WSS_HW_INTERWAVE && !chip->single_dma) {
657 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE)
659 (chip->image[CS4231_REC_FORMAT] & 0x0f);
661 chip->image[CS4231_PLAYBK_FORMAT] = pdfr;
663 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, pdfr);
664 spin_unlock_irqrestore(&chip->reg_lock, flags);
665 if (chip->hardware == WSS_HW_OPL3SA2)
667 snd_wss_mce_down(chip);
669 mutex_unlock(&chip->mce_mutex);
672 static void snd_wss_capture_format(struct snd_wss *chip,
679 mutex_lock(&chip->mce_mutex);
680 if (chip->hardware == WSS_HW_CS4231A ||
681 (chip->hardware & WSS_HW_CS4232_MASK)) {
682 spin_lock_irqsave(&chip->reg_lock, flags);
683 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (cdfr & 0x0f) || /* rate is same? */
684 (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
685 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
686 chip->image[CS4231_ALT_FEATURE_1] | 0x20);
687 snd_wss_out(chip, CS4231_REC_FORMAT,
688 chip->image[CS4231_REC_FORMAT] = cdfr);
689 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
690 chip->image[CS4231_ALT_FEATURE_1] &= ~0x20);
693 spin_unlock_irqrestore(&chip->reg_lock, flags);
694 } else if (chip->hardware == WSS_HW_AD1845) {
706 spin_lock_irqsave(&chip->reg_lock, flags);
707 snd_wss_out(chip, CS4231_REC_FORMAT, (cdfr & 0xf0));
708 snd_wss_out(chip, AD1845_UPR_FREQ_SEL, (rate >> 8) & 0xff);
709 snd_wss_out(chip, AD1845_LWR_FREQ_SEL, rate & 0xff);
711 spin_unlock_irqrestore(&chip->reg_lock, flags);
714 snd_wss_mce_up(chip);
715 spin_lock_irqsave(&chip->reg_lock, flags);
716 if (chip->hardware != WSS_HW_INTERWAVE &&
717 !(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
718 if (chip->single_dma)
719 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, cdfr);
721 snd_wss_out(chip, CS4231_PLAYBK_FORMAT,
722 (chip->image[CS4231_PLAYBK_FORMAT] & 0xf0) |
724 spin_unlock_irqrestore(&chip->reg_lock, flags);
725 snd_wss_mce_down(chip);
726 snd_wss_mce_up(chip);
727 spin_lock_irqsave(&chip->reg_lock, flags);
729 if (chip->hardware & WSS_HW_AD1848_MASK)
730 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, cdfr);
732 snd_wss_out(chip, CS4231_REC_FORMAT, cdfr);
733 spin_unlock_irqrestore(&chip->reg_lock, flags);
734 snd_wss_mce_down(chip);
736 mutex_unlock(&chip->mce_mutex);
745 struct snd_wss *chip = snd_timer_chip(timer);
746 if (chip->hardware & WSS_HW_CS4236B_MASK)
749 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
756 struct snd_wss *chip = snd_timer_chip(timer);
757 spin_lock_irqsave(&chip->reg_lock, flags);
759 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
760 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
761 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
762 chip->image[CS4231_TIMER_HIGH] = (unsigned char) (ticks >> 8);
763 snd_wss_out(chip, CS4231_TIMER_HIGH,
764 chip->image[CS4231_TIMER_HIGH]);
765 chip->image[CS4231_TIMER_LOW] = (unsigned char) ticks;
766 snd_wss_out(chip, CS4231_TIMER_LOW,
767 chip->image[CS4231_TIMER_LOW]);
768 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
769 chip->image[CS4231_ALT_FEATURE_1] |
772 spin_unlock_irqrestore(&chip->reg_lock, flags);
779 struct snd_wss *chip = snd_timer_chip(timer);
780 spin_lock_irqsave(&chip->reg_lock, flags);
781 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
782 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
783 chip->image[CS4231_ALT_FEATURE_1]);
784 spin_unlock_irqrestore(&chip->reg_lock, flags);
788 static void snd_wss_init(struct snd_wss *chip)
792 snd_wss_calibrate_mute(chip, 1);
793 snd_wss_mce_down(chip);
798 snd_wss_mce_up(chip);
799 spin_lock_irqsave(&chip->reg_lock, flags);
800 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
805 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
806 snd_wss_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
807 spin_unlock_irqrestore(&chip->reg_lock, flags);
808 snd_wss_mce_down(chip);
814 snd_wss_mce_up(chip);
815 spin_lock_irqsave(&chip->reg_lock, flags);
816 chip->image[CS4231_IFACE_CTRL] &= ~CS4231_AUTOCALIB;
817 snd_wss_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
818 snd_wss_out(chip,
819 CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
820 spin_unlock_irqrestore(&chip->reg_lock, flags);
821 snd_wss_mce_down(chip);
825 chip->image[CS4231_ALT_FEATURE_1]);
828 spin_lock_irqsave(&chip->reg_lock, flags);
829 snd_wss_out(chip, CS4231_ALT_FEATURE_2,
830 chip->image[CS4231_ALT_FEATURE_2]);
831 spin_unlock_irqrestore(&chip->reg_lock, flags);
833 snd_wss_mce_up(chip);
834 spin_lock_irqsave(&chip->reg_lock, flags);
835 snd_wss_out(chip, CS4231_PLAYBK_FORMAT,
836 chip->image[CS4231_PLAYBK_FORMAT]);
837 spin_unlock_irqrestore(&chip->reg_lock, flags);
838 snd_wss_mce_down(chip);
844 snd_wss_mce_up(chip);
845 spin_lock_irqsave(&chip->reg_lock, flags);
846 if (!(chip->hardware & WSS_HW_AD1848_MASK))
847 snd_wss_out(chip, CS4231_REC_FORMAT,
848 chip->image[CS4231_REC_FORMAT]);
849 spin_unlock_irqrestore(&chip->reg_lock, flags);
850 snd_wss_mce_down(chip);
851 snd_wss_calibrate_mute(chip, 0);
858 static int snd_wss_open(struct snd_wss *chip, unsigned int mode)
862 mutex_lock(&chip->open_mutex);
863 if ((chip->mode & mode) ||
864 ((chip->mode & WSS_MODE_OPEN) && chip->single_dma)) {
865 mutex_unlock(&chip->open_mutex);
868 if (chip->mode & WSS_MODE_OPEN) {
869 chip->mode |= mode;
870 mutex_unlock(&chip->open_mutex);
874 spin_lock_irqsave(&chip->reg_lock, flags);
875 if (!(chip->hardware & WSS_HW_AD1848_MASK)) {
876 snd_wss_out(chip, CS4231_IRQ_STATUS,
880 snd_wss_out(chip, CS4231_IRQ_STATUS, 0);
882 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
883 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
884 chip->image[CS4231_PIN_CTRL] |= CS4231_IRQ_ENABLE;
885 snd_wss_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
886 if (!(chip->hardware & WSS_HW_AD1848_MASK)) {
887 snd_wss_out(chip, CS4231_IRQ_STATUS,
891 snd_wss_out(chip, CS4231_IRQ_STATUS, 0);
893 spin_unlock_irqrestore(&chip->reg_lock, flags);
895 chip->mode = mode;
896 mutex_unlock(&chip->open_mutex);
900 static void snd_wss_close(struct snd_wss *chip, unsigned int mode)
904 mutex_lock(&chip->open_mutex);
905 chip->mode &= ~mode;
906 if (chip->mode & WSS_MODE_OPEN) {
907 mutex_unlock(&chip->open_mutex);
911 spin_lock_irqsave(&chip->reg_lock, flags);
912 if (!(chip->hardware & WSS_HW_AD1848_MASK))
913 snd_wss_out(chip, CS4231_IRQ_STATUS, 0);
914 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
915 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
916 chip->image[CS4231_PIN_CTRL] &= ~CS4231_IRQ_ENABLE;
917 snd_wss_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
921 if (chip->image[CS4231_IFACE_CTRL] & (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
923 spin_unlock_irqrestore(&chip->reg_lock, flags);
924 snd_wss_mce_up(chip);
925 spin_lock_irqsave(&chip->reg_lock, flags);
926 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
928 snd_wss_out(chip, CS4231_IFACE_CTRL,
929 chip->image[CS4231_IFACE_CTRL]);
930 spin_unlock_irqrestore(&chip->reg_lock, flags);
931 snd_wss_mce_down(chip);
932 spin_lock_irqsave(&chip->reg_lock, flags);
936 if (!(chip->hardware & WSS_HW_AD1848_MASK))
937 snd_wss_out(chip, CS4231_IRQ_STATUS, 0);
938 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
939 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
940 spin_unlock_irqrestore(&chip->reg_lock, flags);
942 chip->mode = 0;
943 mutex_unlock(&chip->open_mutex);
952 struct snd_wss *chip = snd_timer_chip(timer);
953 snd_wss_open(chip, WSS_MODE_TIMER);
959 struct snd_wss *chip = snd_timer_chip(timer);
960 snd_wss_close(chip, WSS_MODE_TIMER);
983 struct snd_wss *chip = snd_pcm_substream_chip(substream);
986 new_pdfr = snd_wss_get_format(chip, params_format(hw_params),
989 chip->set_playback_format(chip, hw_params, new_pdfr);
995 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1001 spin_lock_irqsave(&chip->reg_lock, flags);
1002 chip->p_dma_size = size;
1003 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO);
1004 snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
1005 count = snd_wss_get_count(chip->image[CS4231_PLAYBK_FORMAT], count) - 1;
1006 snd_wss_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
1007 snd_wss_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
1008 spin_unlock_irqrestore(&chip->reg_lock, flags);
1010 snd_wss_debug(chip);
1018 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1021 new_cdfr = snd_wss_get_format(chip, params_format(hw_params),
1024 chip->set_capture_format(chip, hw_params, new_cdfr);
1030 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1036 spin_lock_irqsave(&chip->reg_lock, flags);
1037 chip->c_dma_size = size;
1038 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
1039 snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
1040 if (chip->hardware & WSS_HW_AD1848_MASK)
1041 count = snd_wss_get_count(chip->image[CS4231_PLAYBK_FORMAT],
1044 count = snd_wss_get_count(chip->image[CS4231_REC_FORMAT],
1047 if (chip->single_dma && chip->hardware != WSS_HW_INTERWAVE) {
1048 snd_wss_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
1049 snd_wss_out(chip, CS4231_PLY_UPR_CNT,
1052 snd_wss_out(chip, CS4231_REC_LWR_CNT, (unsigned char) count);
1053 snd_wss_out(chip, CS4231_REC_UPR_CNT,
1056 spin_unlock_irqrestore(&chip->reg_lock, flags);
1060 void snd_wss_overrange(struct snd_wss *chip)
1065 spin_lock_irqsave(&chip->reg_lock, flags);
1066 res = snd_wss_in(chip, CS4231_TEST_INIT);
1067 spin_unlock_irqrestore(&chip->reg_lock, flags);
1069 chip->capture_substream->runtime->overrange++;
1075 struct snd_wss *chip = dev_id;
1078 if (chip->hardware & WSS_HW_AD1848_MASK)
1082 status = snd_wss_in(chip, CS4231_IRQ_STATUS);
1084 if (chip->timer)
1085 snd_timer_interrupt(chip->timer, chip->timer->sticks);
1087 if (chip->single_dma && chip->hardware != WSS_HW_INTERWAVE) {
1089 if (chip->mode & WSS_MODE_PLAY) {
1090 if (chip->playback_substream)
1091 snd_pcm_period_elapsed(chip->playback_substream);
1093 if (chip->mode & WSS_MODE_RECORD) {
1094 if (chip->capture_substream) {
1095 snd_wss_overrange(chip);
1096 snd_pcm_period_elapsed(chip->capture_substream);
1102 if (chip->playback_substream)
1103 snd_pcm_period_elapsed(chip->playback_substream);
1106 if (chip->capture_substream) {
1107 snd_wss_overrange(chip);
1108 snd_pcm_period_elapsed(chip->capture_substream);
1113 spin_lock(&chip->reg_lock);
1115 if (chip->hardware & WSS_HW_AD1848_MASK)
1116 wss_outb(chip, CS4231P(STATUS), 0);
1118 snd_wss_out(chip, CS4231_IRQ_STATUS, status);
1119 spin_unlock(&chip->reg_lock);
1126 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1129 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1131 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
1137 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1140 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1142 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
1150 static int snd_ad1848_probe(struct snd_wss *chip)
1159 while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
1164 spin_lock_irqsave(&chip->reg_lock, flags);
1167 snd_wss_dout(chip, CS4231_MISC_INFO, 0);
1169 snd_wss_dout(chip, CS4231_RIGHT_INPUT, 0x45); /* 0x55 & ~0x10 */
1170 r = snd_wss_in(chip, CS4231_RIGHT_INPUT);
1179 snd_wss_dout(chip, CS4231_LEFT_INPUT, 0xaa);
1180 r = snd_wss_in(chip, CS4231_LEFT_INPUT);
1189 wss_inb(chip, CS4231P(STATUS));
1190 wss_outb(chip, CS4231P(STATUS), 0);
1193 if ((chip->hardware & WSS_HW_TYPE_MASK) != WSS_HW_DETECT)
1197 chip->hardware = hardware;
1201 r = snd_wss_in(chip, CS4231_MISC_INFO);
1204 snd_wss_dout(chip, CS4231_MISC_INFO, CS4231_MODE2);
1206 if (snd_wss_in(chip, i) != snd_wss_in(chip, 16 + i)) {
1214 snd_wss_dout(chip, CS4231_VERSION, 0);
1215 r = snd_wss_in(chip, CS4231_VERSION) & 0xe7;
1217 chip->hardware = WSS_HW_CMI8330;
1222 chip->hardware = WSS_HW_CS4248;
1224 chip->hardware = WSS_HW_AD1848;
1226 snd_wss_dout(chip, CS4231_MISC_INFO, 0);
1228 spin_unlock_irqrestore(&chip->reg_lock, flags);
1232 static int snd_wss_probe(struct snd_wss *chip)
1239 id = snd_ad1848_probe(chip);
1243 hw = chip->hardware;
1247 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
1250 spin_lock_irqsave(&chip->reg_lock, flags);
1251 snd_wss_out(chip, CS4231_MISC_INFO,
1253 id = snd_wss_in(chip, CS4231_MISC_INFO) & 0x0f;
1254 spin_unlock_irqrestore(&chip->reg_lock, flags);
1259 snd_printdd("wss: port = 0x%lx, id = 0x%x\n", chip->port, id);
1263 rev = snd_wss_in(chip, CS4231_VERSION) & 0xe7;
1266 unsigned char tmp = snd_wss_in(chip, 23);
1267 snd_wss_out(chip, 23, ~tmp);
1268 if (snd_wss_in(chip, 23) != tmp)
1269 chip->hardware = WSS_HW_AD1845;
1271 chip->hardware = WSS_HW_CS4231;
1273 chip->hardware = WSS_HW_CS4231A;
1275 chip->hardware = WSS_HW_CS4232;
1277 chip->hardware = WSS_HW_CS4232A;
1279 chip->hardware = WSS_HW_CS4236;
1281 chip->hardware = WSS_HW_CS4236B;
1284 "unknown CS chip with version 0x%x\n", rev);
1285 return -ENODEV; /* unknown CS4231 chip? */
1288 spin_lock_irqsave(&chip->reg_lock, flags);
1289 wss_inb(chip, CS4231P(STATUS)); /* clear any pendings IRQ */
1290 wss_outb(chip, CS4231P(STATUS), 0);
1292 spin_unlock_irqrestore(&chip->reg_lock, flags);
1294 if (!(chip->hardware & WSS_HW_AD1848_MASK))
1295 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1296 switch (chip->hardware) {
1298 chip->image[CS4231_MISC_INFO] = CS4231_IW_MODE3;
1306 chip->image[CS4231_MISC_INFO] = CS4231_4236_MODE3;
1308 chip->hardware = WSS_HW_CS4236;
1312 chip->image[CS4231_IFACE_CTRL] =
1313 (chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA) |
1314 (chip->single_dma ? CS4231_SINGLE_DMA : 0);
1315 if (chip->hardware != WSS_HW_OPTI93X) {
1316 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1317 chip->image[CS4231_ALT_FEATURE_2] =
1318 chip->hardware == WSS_HW_INTERWAVE ? 0xc2 : 0x01;
1321 if (chip->hardware == WSS_HW_AD1845)
1322 chip->image[AD1845_PWR_DOWN] = 8;
1324 ptr = (unsigned char *) &chip->image;
1325 regnum = (chip->hardware & WSS_HW_AD1848_MASK) ? 16 : 32;
1326 snd_wss_mce_down(chip);
1327 spin_lock_irqsave(&chip->reg_lock, flags);
1329 snd_wss_out(chip, i, *ptr++);
1330 spin_unlock_irqrestore(&chip->reg_lock, flags);
1331 snd_wss_mce_up(chip);
1332 snd_wss_mce_down(chip);
1338 if (chip->hardware == WSS_HW_CS4236B) {
1339 rev = snd_cs4236_ext_in(chip, CS4236_VERSION);
1340 snd_cs4236_ext_out(chip, CS4236_VERSION, 0xff);
1341 id = snd_cs4236_ext_in(chip, CS4236_VERSION);
1342 snd_cs4236_ext_out(chip, CS4236_VERSION, rev);
1345 chip->hardware = WSS_HW_CS4235;
1353 "unknown CS4235 chip "
1363 chip->hardware = WSS_HW_CS4236B;
1367 "unknown CS4236 chip "
1372 chip->hardware = WSS_HW_CS4237B;
1381 "unknown CS4237B chip "
1386 chip->hardware = WSS_HW_CS4238B;
1394 "unknown CS4238B chip "
1399 chip->hardware = WSS_HW_CS4239;
1407 "unknown CS4239 chip "
1413 "unknown CS4236/CS423xB chip "
1472 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1479 if (chip->hardware & WSS_HW_AD1848_MASK)
1484 if (chip->hardware == WSS_HW_INTERWAVE && chip->dma1 > 3)
1488 if (chip->hardware == WSS_HW_CS4235 ||
1489 chip->hardware == WSS_HW_CS4239)
1492 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
1493 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
1495 if (chip->claim_dma) {
1496 err = chip->claim_dma(chip, chip->dma_private_data, chip->dma1);
1501 err = snd_wss_open(chip, WSS_MODE_PLAY);
1503 if (chip->release_dma)
1504 chip->release_dma(chip, chip->dma_private_data, chip->dma1);
1507 chip->playback_substream = substream;
1509 chip->rate_constraint(runtime);
1515 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1522 if (chip->hardware & WSS_HW_AD1848_MASK)
1527 if (chip->hardware == WSS_HW_CS4235 ||
1528 chip->hardware == WSS_HW_CS4239 ||
1529 chip->hardware == WSS_HW_OPTI93X)
1533 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
1534 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
1536 if (chip->claim_dma) {
1537 err = chip->claim_dma(chip, chip->dma_private_data, chip->dma2);
1542 err = snd_wss_open(chip, WSS_MODE_RECORD);
1544 if (chip->release_dma)
1545 chip->release_dma(chip, chip->dma_private_data, chip->dma2);
1548 chip->capture_substream = substream;
1550 chip->rate_constraint(runtime);
1556 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1558 chip->playback_substream = NULL;
1559 snd_wss_close(chip, WSS_MODE_PLAY);
1565 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1567 chip->capture_substream = NULL;
1568 snd_wss_close(chip, WSS_MODE_RECORD);
1572 static void snd_wss_thinkpad_twiddle(struct snd_wss *chip, int on)
1576 if (!chip->thinkpad_flag)
1595 static void snd_wss_suspend(struct snd_wss *chip)
1600 spin_lock_irqsave(&chip->reg_lock, flags);
1602 chip->image[reg] = snd_wss_in(chip, reg);
1603 spin_unlock_irqrestore(&chip->reg_lock, flags);
1604 if (chip->thinkpad_flag)
1605 snd_wss_thinkpad_twiddle(chip, 0);
1609 static void snd_wss_resume(struct snd_wss *chip)
1615 if (chip->thinkpad_flag)
1616 snd_wss_thinkpad_twiddle(chip, 1);
1617 snd_wss_mce_up(chip);
1618 spin_lock_irqsave(&chip->reg_lock, flags);
1624 snd_wss_out(chip, reg, chip->image[reg]);
1629 if (chip->hardware == WSS_HW_OPL3SA2)
1630 snd_wss_out(chip, CS4231_PLAYBK_FORMAT,
1631 chip->image[CS4231_PLAYBK_FORMAT]);
1632 spin_unlock_irqrestore(&chip->reg_lock, flags);
1634 snd_wss_mce_down(chip);
1640 snd_wss_busy_wait(chip);
1641 spin_lock_irqsave(&chip->reg_lock, flags);
1642 chip->mce_bit &= ~CS4231_MCE;
1643 timeout = wss_inb(chip, CS4231P(REGSEL));
1644 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
1645 spin_unlock_irqrestore(&chip->reg_lock, flags);
1648 "- codec still busy\n", chip->port);
1650 !(chip->hardware & (WSS_HW_CS4231_MASK | WSS_HW_CS4232_MASK))) {
1653 snd_wss_busy_wait(chip);
1658 const char *snd_wss_chip_id(struct snd_wss *chip)
1660 switch (chip->hardware) {
1684 return chip->card->shortname;
1708 struct snd_wss *chip;
1711 chip = devm_kzalloc(card->dev, sizeof(*chip), GFP_KERNEL);
1712 if (chip == NULL)
1714 chip->hardware = hardware;
1715 chip->hwshare = hwshare;
1717 spin_lock_init(&chip->reg_lock);
1718 mutex_init(&chip->mce_mutex);
1719 mutex_init(&chip->open_mutex);
1720 chip->card = card;
1721 chip->rate_constraint = snd_wss_xrate;
1722 chip->set_playback_format = snd_wss_playback_format;
1723 chip->set_capture_format = snd_wss_capture_format;
1724 if (chip->hardware == WSS_HW_OPTI93X)
1725 memcpy(&chip->image, &snd_opti93x_original_image,
1728 memcpy(&chip->image, &snd_wss_original_image,
1730 if (chip->hardware & WSS_HW_AD1848_MASK) {
1731 chip->image[CS4231_PIN_CTRL] = 0;
1732 chip->image[CS4231_TEST_INIT] = 0;
1735 *rchip = chip;
1747 struct snd_wss *chip;
1750 err = snd_wss_new(card, hardware, hwshare, &chip);
1754 chip->irq = -1;
1755 chip->dma1 = -1;
1756 chip->dma2 = -1;
1758 chip->res_port = devm_request_region(card->dev, port, 4, "WSS");
1759 if (!chip->res_port) {
1763 chip->port = port;
1765 chip->res_cport = devm_request_region(card->dev, cport, 8,
1767 if (!chip->res_cport) {
1773 chip->cport = cport;
1776 "WSS", (void *) chip)) {
1780 chip->irq = irq;
1781 card->sync_irq = chip->irq;
1787 chip->dma1 = dma1;
1794 chip->single_dma = 1;
1795 chip->dma2 = chip->dma1;
1797 chip->dma2 = dma2;
1800 chip->thinkpad_flag = 1;
1801 chip->hardware = WSS_HW_DETECT; /* reset */
1802 snd_wss_thinkpad_twiddle(chip, 1);
1806 if (snd_wss_probe(chip) < 0)
1808 snd_wss_init(chip);
1811 if (chip->hardware & WSS_HW_CS4232_MASK) {
1812 if (chip->res_cport == NULL)
1820 chip->suspend = snd_wss_suspend;
1821 chip->resume = snd_wss_resume;
1824 *rchip = chip;
1847 int snd_wss_pcm(struct snd_wss *chip, int device)
1852 err = snd_pcm_new(chip->card, "WSS", device, 1, 1, &pcm);
1860 pcm->private_data = chip;
1862 if (chip->single_dma)
1864 if (chip->hardware != WSS_HW_INTERWAVE)
1866 strcpy(pcm->name, snd_wss_chip_id(chip));
1868 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, chip->card->dev,
1869 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
1871 chip->pcm = pcm;
1878 struct snd_wss *chip = timer->private_data;
1879 chip->timer = NULL;
1882 int snd_wss_timer(struct snd_wss *chip, int device)
1891 tid.card = chip->card->number;
1894 err = snd_timer_new(chip->card, "CS4231", &tid, &timer);
1897 strcpy(timer->name, snd_wss_chip_id(chip));
1898 timer->private_data = chip;
1901 chip->timer = timer;
1923 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1925 if (snd_BUG_ON(!chip->card))
1927 if (!strcmp(chip->card->driver, "GUS MAX"))
1929 switch (chip->hardware) {
1944 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1947 spin_lock_irqsave(&chip->reg_lock, flags);
1948 ucontrol->value.enumerated.item[0] = (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1949 ucontrol->value.enumerated.item[1] = (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1950 spin_unlock_irqrestore(&chip->reg_lock, flags);
1957 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1967 spin_lock_irqsave(&chip->reg_lock, flags);
1968 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1969 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1970 change = left != chip->image[CS4231_LEFT_INPUT] ||
1971 right != chip->image[CS4231_RIGHT_INPUT];
1972 snd_wss_out(chip, CS4231_LEFT_INPUT, left);
1973 snd_wss_out(chip, CS4231_RIGHT_INPUT, right);
1974 spin_unlock_irqrestore(&chip->reg_lock, flags);
1994 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
2001 spin_lock_irqsave(&chip->reg_lock, flags);
2002 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
2003 spin_unlock_irqrestore(&chip->reg_lock, flags);
2013 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
2026 spin_lock_irqsave(&chip->reg_lock, flags);
2027 val = (chip->image[reg] & ~(mask << shift)) | val;
2028 change = val != chip->image[reg];
2029 snd_wss_out(chip, reg, val);
2030 spin_unlock_irqrestore(&chip->reg_lock, flags);
2051 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
2060 spin_lock_irqsave(&chip->reg_lock, flags);
2061 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
2062 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
2063 spin_unlock_irqrestore(&chip->reg_lock, flags);
2075 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
2094 spin_lock_irqsave(&chip->reg_lock, flags);
2096 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
2097 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
2098 change = val1 != chip->image[left_reg] ||
2099 val2 != chip->image[right_reg];
2100 snd_wss_out(chip, left_reg, val1);
2101 snd_wss_out(chip, right_reg, val2);
2104 val1 = (chip->image[left_reg] & ~mask) | val1 | val2;
2105 change = val1 != chip->image[left_reg];
2106 snd_wss_out(chip, left_reg, val1);
2108 spin_unlock_irqrestore(&chip->reg_lock, flags);
2165 int snd_wss_mixer(struct snd_wss *chip)
2172 if (snd_BUG_ON(!chip || !chip->pcm))
2175 card = chip->card;
2177 strcpy(card->mixername, chip->pcm->name);
2180 if (chip->hardware & WSS_HW_AD1848_MASK)
2183 else if (chip->hardware == WSS_HW_OPTI93X)
2189 chip));