Lines Matching refs:emu
35 void snd_emu8000_poke(struct snd_emu8000 *emu, unsigned int port, unsigned int reg, unsigned int val)
38 spin_lock_irqsave(&emu->reg_lock, flags);
39 if (reg != emu->last_reg) {
40 outw((unsigned short)reg, EMU8000_PTR(emu)); /* Set register */
41 emu->last_reg = reg;
44 spin_unlock_irqrestore(&emu->reg_lock, flags);
48 unsigned short snd_emu8000_peek(struct snd_emu8000 *emu, unsigned int port, unsigned int reg)
52 spin_lock_irqsave(&emu->reg_lock, flags);
53 if (reg != emu->last_reg) {
54 outw((unsigned short)reg, EMU8000_PTR(emu)); /* Set register */
55 emu->last_reg = reg;
58 spin_unlock_irqrestore(&emu->reg_lock, flags);
63 void snd_emu8000_poke_dw(struct snd_emu8000 *emu, unsigned int port, unsigned int reg, unsigned int val)
66 spin_lock_irqsave(&emu->reg_lock, flags);
67 if (reg != emu->last_reg) {
68 outw((unsigned short)reg, EMU8000_PTR(emu)); /* Set register */
69 emu->last_reg = reg;
73 spin_unlock_irqrestore(&emu->reg_lock, flags);
77 unsigned int snd_emu8000_peek_dw(struct snd_emu8000 *emu, unsigned int port, unsigned int reg)
82 spin_lock_irqsave(&emu->reg_lock, flags);
83 if (reg != emu->last_reg) {
84 outw((unsigned short)reg, EMU8000_PTR(emu)); /* Set register */
85 emu->last_reg = reg;
89 spin_unlock_irqrestore(&emu->reg_lock, flags);
97 snd_emu8000_dma_chan(struct snd_emu8000 *emu, int ch, int mode)
102 EMU8000_CCCA_WRITE(emu, ch, 0);
103 EMU8000_DCYSUSV_WRITE(emu, ch, 0x807F);
106 EMU8000_DCYSUSV_WRITE(emu, ch, 0x80);
107 EMU8000_VTFT_WRITE(emu, ch, 0);
108 EMU8000_CVCF_WRITE(emu, ch, 0);
109 EMU8000_PTRX_WRITE(emu, ch, 0x40000000);
110 EMU8000_CPF_WRITE(emu, ch, 0x40000000);
111 EMU8000_PSST_WRITE(emu, ch, 0);
112 EMU8000_CSL_WRITE(emu, ch, 0);
114 EMU8000_CCCA_WRITE(emu, ch, 0x06000000 | right_bit);
116 EMU8000_CCCA_WRITE(emu, ch, 0x04000000 | right_bit);
122 snd_emu8000_read_wait(struct snd_emu8000 *emu)
124 while ((EMU8000_SMALR_READ(emu) & 0x80000000) != 0) {
134 snd_emu8000_write_wait(struct snd_emu8000 *emu)
136 while ((EMU8000_SMALW_READ(emu) & 0x80000000) != 0) {
147 snd_emu8000_detect(struct snd_emu8000 *emu)
150 EMU8000_HWCF1_WRITE(emu, 0x0059);
151 EMU8000_HWCF2_WRITE(emu, 0x0020);
152 EMU8000_HWCF3_WRITE(emu, 0x0000);
155 if ((EMU8000_U1_READ(emu) & 0x000f) != 0x000c)
158 if ((EMU8000_HWCF1_READ(emu) & 0x007e) != 0x0058)
160 if ((EMU8000_HWCF2_READ(emu) & 0x0003) != 0x0003)
164 emu->port1);
173 init_audio(struct snd_emu8000 *emu)
179 EMU8000_DCYSUSV_WRITE(emu, ch, 0x80);
183 EMU8000_ENVVOL_WRITE(emu, ch, 0);
184 EMU8000_ENVVAL_WRITE(emu, ch, 0);
185 EMU8000_DCYSUS_WRITE(emu, ch, 0);
186 EMU8000_ATKHLDV_WRITE(emu, ch, 0);
187 EMU8000_LFO1VAL_WRITE(emu, ch, 0);
188 EMU8000_ATKHLD_WRITE(emu, ch, 0);
189 EMU8000_LFO2VAL_WRITE(emu, ch, 0);
190 EMU8000_IP_WRITE(emu, ch, 0);
191 EMU8000_IFATN_WRITE(emu, ch, 0);
192 EMU8000_PEFE_WRITE(emu, ch, 0);
193 EMU8000_FMMOD_WRITE(emu, ch, 0);
194 EMU8000_TREMFRQ_WRITE(emu, ch, 0);
195 EMU8000_FM2FRQ2_WRITE(emu, ch, 0);
196 EMU8000_PTRX_WRITE(emu, ch, 0);
197 EMU8000_VTFT_WRITE(emu, ch, 0);
198 EMU8000_PSST_WRITE(emu, ch, 0);
199 EMU8000_CSL_WRITE(emu, ch, 0);
200 EMU8000_CCCA_WRITE(emu, ch, 0);
204 EMU8000_CPF_WRITE(emu, ch, 0);
205 EMU8000_CVCF_WRITE(emu, ch, 0);
214 init_dma(struct snd_emu8000 *emu)
216 EMU8000_SMALR_WRITE(emu, 0);
217 EMU8000_SMARR_WRITE(emu, 0);
218 EMU8000_SMALW_WRITE(emu, 0);
219 EMU8000_SMARW_WRITE(emu, 0);
318 send_array(struct snd_emu8000 *emu, const unsigned short *data, int size)
325 EMU8000_INIT1_WRITE(emu, i, *p);
327 EMU8000_INIT2_WRITE(emu, i, *p);
329 EMU8000_INIT3_WRITE(emu, i, *p);
331 EMU8000_INIT4_WRITE(emu, i, *p);
340 init_arrays(struct snd_emu8000 *emu)
342 send_array(emu, init1, ARRAY_SIZE(init1)/4);
345 send_array(emu, init2, ARRAY_SIZE(init2)/4);
346 send_array(emu, init3, ARRAY_SIZE(init3)/4);
348 EMU8000_HWCF4_WRITE(emu, 0);
349 EMU8000_HWCF5_WRITE(emu, 0x83);
350 EMU8000_HWCF6_WRITE(emu, 0x8000);
352 send_array(emu, init4, ARRAY_SIZE(init4)/4);
366 size_dram(struct snd_emu8000 *emu)
370 if (emu->dram_checked)
376 snd_emu8000_dma_chan(emu, 0, EMU8000_RAM_WRITE);
377 snd_emu8000_dma_chan(emu, 1, EMU8000_RAM_READ);
378 EMU8000_SMALW_WRITE(emu, EMU8000_DRAM_OFFSET);
379 EMU8000_SMLD_WRITE(emu, UNIQUE_ID1);
380 snd_emu8000_init_fm(emu); /* This must really be here and not 2 lines back even */
381 snd_emu8000_write_wait(emu);
387 EMU8000_SMALR_WRITE(emu, EMU8000_DRAM_OFFSET);
388 EMU8000_SMLD_READ(emu); /* discard stale data */
389 if (EMU8000_SMLD_READ(emu) != UNIQUE_ID1)
391 snd_emu8000_read_wait(emu);
400 /*snd_emu8000_dma_chan(emu, 0, EMU8000_RAM_WRITE);*/
401 EMU8000_SMALW_WRITE(emu, EMU8000_DRAM_OFFSET + (size>>1));
402 EMU8000_SMLD_WRITE(emu, UNIQUE_ID2);
403 snd_emu8000_write_wait(emu);
409 /*snd_emu8000_dma_chan(emu, 0, EMU8000_RAM_READ);*/
410 EMU8000_SMALR_WRITE(emu, EMU8000_DRAM_OFFSET + (size>>1));
411 /*snd_emu8000_read_wait(emu);*/
412 EMU8000_SMLD_READ(emu); /* discard stale data */
413 if (EMU8000_SMLD_READ(emu) != UNIQUE_ID2)
415 snd_emu8000_read_wait(emu);
422 EMU8000_SMALR_WRITE(emu, EMU8000_DRAM_OFFSET);
423 EMU8000_SMLD_READ(emu); /* discard stale data */
424 if (EMU8000_SMLD_READ(emu) != UNIQUE_ID1)
426 snd_emu8000_read_wait(emu);
434 if ((EMU8000_SMALW_READ(emu) & 0x80000000) == 0)
440 snd_emu8000_dma_chan(emu, 0, EMU8000_RAM_CLOSE);
441 snd_emu8000_dma_chan(emu, 1, EMU8000_RAM_CLOSE);
444 emu->port1, size/1024);
446 emu->mem_size = size;
447 emu->dram_checked = 1;
456 snd_emu8000_init_fm(struct snd_emu8000 *emu)
464 EMU8000_DCYSUSV_WRITE(emu, 30, 0x80);
465 EMU8000_PSST_WRITE(emu, 30, 0xFFFFFFE0); /* full left */
466 EMU8000_CSL_WRITE(emu, 30, 0x00FFFFE8 | (emu->fm_chorus_depth << 24));
467 EMU8000_PTRX_WRITE(emu, 30, (emu->fm_reverb_depth << 8));
468 EMU8000_CPF_WRITE(emu, 30, 0);
469 EMU8000_CCCA_WRITE(emu, 30, 0x00FFFFE3);
472 EMU8000_DCYSUSV_WRITE(emu, 31, 0x80);
473 EMU8000_PSST_WRITE(emu, 31, 0x00FFFFF0); /* full right */
474 EMU8000_CSL_WRITE(emu, 31, 0x00FFFFF8 | (emu->fm_chorus_depth << 24));
475 EMU8000_PTRX_WRITE(emu, 31, (emu->fm_reverb_depth << 8));
476 EMU8000_CPF_WRITE(emu, 31, 0x8000);
477 EMU8000_CCCA_WRITE(emu, 31, 0x00FFFFF3);
479 snd_emu8000_poke((emu), EMU8000_DATA0(emu), EMU8000_CMD(1, (30)), 0);
481 spin_lock_irqsave(&emu->reg_lock, flags);
482 while (!(inw(EMU8000_PTR(emu)) & 0x1000))
484 while ((inw(EMU8000_PTR(emu)) & 0x1000))
486 spin_unlock_irqrestore(&emu->reg_lock, flags);
487 snd_emu8000_poke((emu), EMU8000_DATA0(emu), EMU8000_CMD(1, (30)), 0x4828);
489 outb(0x3C, EMU8000_PTR(emu));
490 outb(0, EMU8000_DATA1(emu));
493 EMU8000_VTFT_WRITE(emu, 30, 0x8000FFFF);
494 EMU8000_VTFT_WRITE(emu, 31, 0x8000FFFF);
502 snd_emu8000_init_hw(struct snd_emu8000 *emu)
506 emu->last_reg = 0xffff; /* reset the last register index */
509 EMU8000_HWCF1_WRITE(emu, 0x0059);
510 EMU8000_HWCF2_WRITE(emu, 0x0020);
513 EMU8000_HWCF3_WRITE(emu, 0);
516 init_audio(emu);
519 init_dma(emu);
522 init_arrays(emu);
528 snd_emu8000_init_fm(emu);
532 EMU8000_DCYSUSV_WRITE(emu, 0, 0x807F);
535 size_dram(emu);
538 EMU8000_HWCF3_WRITE(emu, 0x4);
541 snd_emu8000_update_equalizer(emu);
542 snd_emu8000_update_chorus_mode(emu);
543 snd_emu8000_update_reverb_mode(emu);
586 snd_emu8000_update_equalizer(struct snd_emu8000 *emu)
589 int bass = emu->bass_level;
590 int treble = emu->treble_level;
594 EMU8000_INIT4_WRITE(emu, 0x01, bass_parm[bass][0]);
595 EMU8000_INIT4_WRITE(emu, 0x11, bass_parm[bass][1]);
596 EMU8000_INIT3_WRITE(emu, 0x11, treble_parm[treble][0]);
597 EMU8000_INIT3_WRITE(emu, 0x13, treble_parm[treble][1]);
598 EMU8000_INIT3_WRITE(emu, 0x1b, treble_parm[treble][2]);
599 EMU8000_INIT4_WRITE(emu, 0x07, treble_parm[treble][3]);
600 EMU8000_INIT4_WRITE(emu, 0x0b, treble_parm[treble][4]);
601 EMU8000_INIT4_WRITE(emu, 0x0d, treble_parm[treble][5]);
602 EMU8000_INIT4_WRITE(emu, 0x17, treble_parm[treble][6]);
603 EMU8000_INIT4_WRITE(emu, 0x19, treble_parm[treble][7]);
605 EMU8000_INIT4_WRITE(emu, 0x15, (unsigned short)(w + 0x0262));
606 EMU8000_INIT4_WRITE(emu, 0x1d, (unsigned short)(w + 0x8362));
651 snd_emu8000_load_chorus_fx(struct snd_emu8000 *emu, int mode, const void __user *buf, long len)
666 snd_emu8000_update_chorus_mode(struct snd_emu8000 *emu)
668 int effect = emu->chorus_mode;
672 EMU8000_INIT3_WRITE(emu, 0x09, chorus_parm[effect].feedback);
673 EMU8000_INIT3_WRITE(emu, 0x0c, chorus_parm[effect].delay_offset);
674 EMU8000_INIT4_WRITE(emu, 0x03, chorus_parm[effect].lfo_depth);
675 EMU8000_HWCF4_WRITE(emu, chorus_parm[effect].delay);
676 EMU8000_HWCF5_WRITE(emu, chorus_parm[effect].lfo_freq);
677 EMU8000_HWCF6_WRITE(emu, 0x8000);
678 EMU8000_HWCF7_WRITE(emu, 0x0000);
778 snd_emu8000_load_reverb_fx(struct snd_emu8000 *emu, int mode, const void __user *buf, long len)
794 snd_emu8000_update_reverb_mode(struct snd_emu8000 *emu)
796 int effect = emu->reverb_mode;
805 port = EMU8000_DATA1(emu);
807 port = EMU8000_DATA2(emu);
808 snd_emu8000_poke(emu, port, reverb_cmds[i].cmd, reverb_parm[effect].parms[i]);
831 struct snd_emu8000 *emu = snd_kcontrol_chip(kcontrol);
833 ucontrol->value.integer.value[0] = kcontrol->private_value ? emu->treble_level : emu->bass_level;
839 struct snd_emu8000 *emu = snd_kcontrol_chip(kcontrol);
845 spin_lock_irqsave(&emu->control_lock, flags);
847 change = val1 != emu->treble_level;
848 emu->treble_level = val1;
850 change = val1 != emu->bass_level;
851 emu->bass_level = val1;
853 spin_unlock_irqrestore(&emu->control_lock, flags);
854 snd_emu8000_update_equalizer(emu);
892 struct snd_emu8000 *emu = snd_kcontrol_chip(kcontrol);
894 ucontrol->value.integer.value[0] = kcontrol->private_value ? emu->chorus_mode : emu->reverb_mode;
900 struct snd_emu8000 *emu = snd_kcontrol_chip(kcontrol);
905 spin_lock_irqsave(&emu->control_lock, flags);
908 change = val1 != emu->chorus_mode;
909 emu->chorus_mode = val1;
912 change = val1 != emu->reverb_mode;
913 emu->reverb_mode = val1;
915 spin_unlock_irqrestore(&emu->control_lock, flags);
918 snd_emu8000_update_chorus_mode(emu);
920 snd_emu8000_update_reverb_mode(emu);
959 struct snd_emu8000 *emu = snd_kcontrol_chip(kcontrol);
961 ucontrol->value.integer.value[0] = kcontrol->private_value ? emu->fm_chorus_depth : emu->fm_reverb_depth;
967 struct snd_emu8000 *emu = snd_kcontrol_chip(kcontrol);
973 spin_lock_irqsave(&emu->control_lock, flags);
975 change = val1 != emu->fm_chorus_depth;
976 emu->fm_chorus_depth = val1;
978 change = val1 != emu->fm_reverb_depth;
979 emu->fm_reverb_depth = val1;
981 spin_unlock_irqrestore(&emu->control_lock, flags);
983 snd_emu8000_init_fm(emu);
1021 snd_emu8000_create_mixer(struct snd_card *card, struct snd_emu8000 *emu)
1026 if (snd_BUG_ON(!emu || !card))
1029 spin_lock_init(&emu->control_lock);
1031 memset(emu->controls, 0, sizeof(emu->controls));
1033 kctl = snd_ctl_new1(mixer_defs[i], emu);
1037 emu->controls[i] = kctl;
1043 if (emu->controls[i])
1044 snd_ctl_remove(card, emu->controls[i]);