Lines Matching refs:azx_dev
87 * @azx_dev: HD-audio core stream object to initialize
94 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
97 azx_dev->bus = bus;
99 azx_dev->sd_addr = bus->remap_addr + (0x20 * idx + 0x80);
101 azx_dev->sd_int_sta_mask = 1 << idx;
102 azx_dev->index = idx;
103 azx_dev->direction = direction;
104 azx_dev->stream_tag = tag;
105 snd_hdac_dsp_lock_init(azx_dev);
106 list_add_tail(&azx_dev->list, &bus->stream_list);
109 azx_dev->spib_addr = bus->spbcap + AZX_SPB_BASE +
113 azx_dev->fifo_addr = bus->spbcap + AZX_SPB_BASE +
119 azx_dev->dpibr_addr = bus->drsmcap + AZX_DRSM_BASE +
126 * @azx_dev: HD-audio core stream to start
130 void snd_hdac_stream_start(struct hdac_stream *azx_dev)
132 struct hdac_bus *bus = azx_dev->bus;
135 trace_snd_hdac_stream_start(bus, azx_dev);
137 azx_dev->start_wallclk = snd_hdac_chip_readl(bus, WALLCLK);
141 1 << azx_dev->index,
142 1 << azx_dev->index);
144 if (azx_dev->stripe) {
145 if (azx_dev->substream)
146 stripe_ctl = snd_hdac_get_stream_stripe_ctl(bus, azx_dev->substream);
149 snd_hdac_stream_updateb(azx_dev, SD_CTL_3B, SD_CTL_STRIPE_MASK,
154 snd_hdac_stream_updatel(azx_dev, SD_CTL,
157 snd_hdac_stream_updateb(azx_dev, SD_CTL,
159 azx_dev->running = true;
165 * @azx_dev: HD-audio core stream to stop
167 static void snd_hdac_stream_clear(struct hdac_stream *azx_dev)
169 snd_hdac_stream_updateb(azx_dev, SD_CTL,
171 snd_hdac_stream_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */
172 if (azx_dev->stripe)
173 snd_hdac_stream_updateb(azx_dev, SD_CTL_3B, SD_CTL_STRIPE_MASK, 0);
174 azx_dev->running = false;
179 * @azx_dev: HD-audio core stream to stop
183 void snd_hdac_stream_stop(struct hdac_stream *azx_dev)
185 trace_snd_hdac_stream_stop(azx_dev->bus, azx_dev);
187 snd_hdac_stream_clear(azx_dev);
189 snd_hdac_chip_updatel(azx_dev->bus, INTCTL, 1 << azx_dev->index, 0);
222 * @azx_dev: HD-audio core stream to reset
224 void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
229 snd_hdac_stream_clear(azx_dev);
231 dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START;
233 snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET);
236 snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val & SD_CTL_STREAM_RESET), 3, 300);
238 if (azx_dev->bus->dma_stop_delay && dma_run_state)
239 udelay(azx_dev->bus->dma_stop_delay);
241 snd_hdac_stream_updateb(azx_dev, SD_CTL, SD_CTL_STREAM_RESET, 0);
244 snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val & SD_CTL_STREAM_RESET), 3, 300);
247 if (azx_dev->posbuf)
248 *azx_dev->posbuf = 0;
254 * @azx_dev: HD-audio core stream to set up
256 int snd_hdac_stream_setup(struct hdac_stream *azx_dev)
258 struct hdac_bus *bus = azx_dev->bus;
262 if (azx_dev->substream)
263 runtime = azx_dev->substream->runtime;
267 snd_hdac_stream_clear(azx_dev);
269 val = snd_hdac_stream_readl(azx_dev, SD_CTL);
271 (azx_dev->stream_tag << SD_CTL_STREAM_TAG_SHIFT);
274 snd_hdac_stream_writel(azx_dev, SD_CTL, val);
277 snd_hdac_stream_writel(azx_dev, SD_CBL, azx_dev->bufsize);
281 snd_hdac_stream_writew(azx_dev, SD_FORMAT, azx_dev->format_val);
284 snd_hdac_stream_writew(azx_dev, SD_LVI, azx_dev->frags - 1);
288 snd_hdac_stream_writel(azx_dev, SD_BDLPL, (u32)azx_dev->bdl.addr);
290 snd_hdac_stream_writel(azx_dev, SD_BDLPU,
291 upper_32_bits(azx_dev->bdl.addr));
301 snd_hdac_stream_updatel(azx_dev, SD_CTL, 0, SD_INT_MASK);
303 azx_dev->fifo_size = snd_hdac_stream_readw(azx_dev, SD_FIFOSIZE) + 1;
310 azx_dev->delay_negative_threshold =
313 azx_dev->delay_negative_threshold = 0;
317 azx_dev->period_wallclk = (((runtime->period_size * 24000) /
326 * @azx_dev: HD-audio core stream to clean up
328 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev)
330 snd_hdac_stream_writel(azx_dev, SD_BDLPL, 0);
331 snd_hdac_stream_writel(azx_dev, SD_BDLPU, 0);
332 snd_hdac_stream_writel(azx_dev, SD_CTL, 0);
333 azx_dev->bufsize = 0;
334 azx_dev->period_bytes = 0;
335 azx_dev->format_val = 0;
353 struct hdac_stream *azx_dev;
363 list_for_each_entry(azx_dev, &bus->stream_list, list) {
364 if (azx_dev->direction != substream->stream)
366 if (azx_dev->opened)
368 if (azx_dev->assigned_key == key) {
369 res = azx_dev;
373 res = azx_dev;
388 * @azx_dev: HD-audio core stream to release
393 void snd_hdac_stream_release_locked(struct hdac_stream *azx_dev)
395 azx_dev->opened = 0;
396 azx_dev->running = 0;
397 azx_dev->substream = NULL;
403 * @azx_dev: HD-audio core stream to release
407 void snd_hdac_stream_release(struct hdac_stream *azx_dev)
409 struct hdac_bus *bus = azx_dev->bus;
412 snd_hdac_stream_release_locked(azx_dev);
444 struct hdac_stream *azx_dev, __le32 **bdlp,
453 if (azx_dev->frags >= AZX_MAX_BDL_ENTRIES)
476 azx_dev->frags++;
485 * @azx_dev: HD-audio core stream to set up
490 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev)
492 struct hdac_bus *bus = azx_dev->bus;
493 struct snd_pcm_substream *substream = azx_dev->substream;
494 struct snd_compr_stream *cstream = azx_dev->cstream;
512 snd_hdac_stream_writel(azx_dev, SD_BDLPL, 0);
513 snd_hdac_stream_writel(azx_dev, SD_BDLPU, 0);
515 period_bytes = azx_dev->period_bytes;
516 periods = azx_dev->bufsize / period_bytes;
519 bdl = (__le32 *)azx_dev->bdl.area;
521 azx_dev->frags = 0;
524 if (runtime && !azx_dev->no_period_wakeup && pos_adj > 0) {
537 ofs = setup_bdle(bus, dmab, azx_dev,
547 ofs = setup_bdle(bus, dmab, azx_dev,
550 ofs = setup_bdle(bus, dmab, azx_dev,
552 !azx_dev->no_period_wakeup);
560 azx_dev->bufsize, period_bytes);
567 * @azx_dev: HD-audio core stream for which parameters are to be set
573 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
576 struct snd_pcm_substream *substream = azx_dev->substream;
577 struct snd_compr_stream *cstream = azx_dev->cstream;
594 if (bufsize != azx_dev->bufsize ||
595 period_bytes != azx_dev->period_bytes ||
596 format_val != azx_dev->format_val ||
597 no_period_wakeup != azx_dev->no_period_wakeup) {
598 azx_dev->bufsize = bufsize;
599 azx_dev->period_bytes = period_bytes;
600 azx_dev->format_val = format_val;
601 azx_dev->no_period_wakeup = no_period_wakeup;
602 err = snd_hdac_stream_setup_periods(azx_dev);
612 struct hdac_stream *azx_dev = container_of(cc, struct hdac_stream, cc);
614 return snd_hdac_chip_readl(azx_dev->bus, WALLCLK);
617 static void azx_timecounter_init(struct hdac_stream *azx_dev,
620 struct timecounter *tc = &azx_dev->tc;
621 struct cyclecounter *cc = &azx_dev->cc;
647 * @azx_dev: HD-audio core stream (master stream)
655 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
658 struct hdac_bus *bus = azx_dev->bus;
659 struct snd_pcm_runtime *runtime = azx_dev->substream->runtime;
681 * @azx_dev: HD-audio core stream (master stream)
686 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
689 struct hdac_bus *bus = azx_dev->bus;
705 * @azx_dev: HD-audio core stream (master stream)
712 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
715 struct hdac_bus *bus = azx_dev->bus;
779 * @azx_dev: hdac_stream
783 struct hdac_stream *azx_dev, u32 value)
790 writel(value, azx_dev->spib_addr);
799 * @azx_dev: hdac_stream
804 struct hdac_stream *azx_dev)
811 return readl(azx_dev->fifo_addr);
842 * @azx_dev: HD-audio core stream to await RSM for
846 int snd_hdac_stream_wait_drsm(struct hdac_stream *azx_dev)
848 struct hdac_bus *bus = azx_dev->bus;
852 mask = 1 << azx_dev->index;
865 * @azx_dev: hdac_stream
869 struct hdac_stream *azx_dev, u32 value)
876 writel(value, azx_dev->dpibr_addr);
884 * @azx_dev: hdac_stream
887 int snd_hdac_stream_set_lpib(struct hdac_stream *azx_dev, u32 value)
889 snd_hdac_stream_writel(azx_dev, SD_LPIB, value);
898 * @azx_dev: HD-audio core stream used for DSP loading
906 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
909 struct hdac_bus *bus = azx_dev->bus;
913 snd_hdac_dsp_lock(azx_dev);
915 if (azx_dev->running || azx_dev->locked) {
920 azx_dev->locked = true;
928 azx_dev->substream = NULL;
929 azx_dev->bufsize = byte_size;
930 azx_dev->period_bytes = byte_size;
931 azx_dev->format_val = format;
933 snd_hdac_stream_reset(azx_dev);
936 snd_hdac_stream_writel(azx_dev, SD_BDLPL, 0);
937 snd_hdac_stream_writel(azx_dev, SD_BDLPU, 0);
939 azx_dev->frags = 0;
940 bdl = (__le32 *)azx_dev->bdl.area;
941 err = setup_bdle(bus, bufp, azx_dev, &bdl, 0, byte_size, 0);
945 snd_hdac_stream_setup(azx_dev);
946 snd_hdac_dsp_unlock(azx_dev);
947 return azx_dev->stream_tag;
953 azx_dev->locked = false;
956 snd_hdac_dsp_unlock(azx_dev);
963 * @azx_dev: HD-audio core stream used for DSP loading
966 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
969 snd_hdac_stream_start(azx_dev);
971 snd_hdac_stream_stop(azx_dev);
977 * @azx_dev: HD-audio core stream used for DSP loading
980 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
983 struct hdac_bus *bus = azx_dev->bus;
985 if (!dmab->area || !azx_dev->locked)
988 snd_hdac_dsp_lock(azx_dev);
990 snd_hdac_stream_writel(azx_dev, SD_BDLPL, 0);
991 snd_hdac_stream_writel(azx_dev, SD_BDLPU, 0);
992 snd_hdac_stream_writel(azx_dev, SD_CTL, 0);
993 azx_dev->bufsize = 0;
994 azx_dev->period_bytes = 0;
995 azx_dev->format_val = 0;
1001 azx_dev->locked = false;
1003 snd_hdac_dsp_unlock(azx_dev);