Lines Matching refs:dg00x
30 int snd_dg00x_stream_get_local_rate(struct snd_dg00x *dg00x, unsigned int *rate)
36 err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
51 int snd_dg00x_stream_set_local_rate(struct snd_dg00x *dg00x, unsigned int rate)
64 return snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST,
69 int snd_dg00x_stream_get_clock(struct snd_dg00x *dg00x,
75 err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
88 int snd_dg00x_stream_check_external_clock(struct snd_dg00x *dg00x, bool *detect)
93 err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
102 int snd_dg00x_stream_get_external_rate(struct snd_dg00x *dg00x,
109 err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
125 static void finish_session(struct snd_dg00x *dg00x)
130 snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST,
136 snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST,
145 static int begin_session(struct snd_dg00x *dg00x)
152 data = cpu_to_be32((dg00x->tx_resources.channel << 16) |
153 dg00x->rx_resources.channel);
154 err = snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST,
160 err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
173 err = snd_fw_transaction(dg00x->unit,
188 static int keep_resources(struct snd_dg00x *dg00x, struct amdtp_stream *stream,
203 if (stream == &dg00x->tx_stream)
204 resources = &dg00x->tx_resources;
206 resources = &dg00x->rx_resources;
215 fw_parent_device(dg00x->unit)->max_speed);
218 static int init_stream(struct snd_dg00x *dg00x, struct amdtp_stream *s)
224 if (s == &dg00x->tx_stream) {
225 resources = &dg00x->tx_resources;
228 resources = &dg00x->rx_resources;
232 err = fw_iso_resources_init(resources, dg00x->unit);
236 err = amdtp_dot_init(s, dg00x->unit, dir);
243 static void destroy_stream(struct snd_dg00x *dg00x, struct amdtp_stream *s)
247 if (s == &dg00x->tx_stream)
248 fw_iso_resources_destroy(&dg00x->tx_resources);
250 fw_iso_resources_destroy(&dg00x->rx_resources);
253 int snd_dg00x_stream_init_duplex(struct snd_dg00x *dg00x)
257 err = init_stream(dg00x, &dg00x->rx_stream);
261 err = init_stream(dg00x, &dg00x->tx_stream);
263 destroy_stream(dg00x, &dg00x->rx_stream);
267 err = amdtp_domain_init(&dg00x->domain);
269 destroy_stream(dg00x, &dg00x->rx_stream);
270 destroy_stream(dg00x, &dg00x->tx_stream);
280 void snd_dg00x_stream_destroy_duplex(struct snd_dg00x *dg00x)
282 amdtp_domain_destroy(&dg00x->domain);
284 destroy_stream(dg00x, &dg00x->rx_stream);
285 destroy_stream(dg00x, &dg00x->tx_stream);
288 int snd_dg00x_stream_reserve_duplex(struct snd_dg00x *dg00x, unsigned int rate,
295 err = snd_dg00x_stream_get_local_rate(dg00x, &curr_rate);
301 if (dg00x->substreams_counter == 0 || curr_rate != rate) {
302 amdtp_domain_stop(&dg00x->domain);
304 finish_session(dg00x);
306 fw_iso_resources_free(&dg00x->tx_resources);
307 fw_iso_resources_free(&dg00x->rx_resources);
309 err = snd_dg00x_stream_set_local_rate(dg00x, rate);
313 err = keep_resources(dg00x, &dg00x->rx_stream, rate);
317 err = keep_resources(dg00x, &dg00x->tx_stream, rate);
319 fw_iso_resources_free(&dg00x->rx_resources);
323 err = amdtp_domain_set_events_per_period(&dg00x->domain,
326 fw_iso_resources_free(&dg00x->rx_resources);
327 fw_iso_resources_free(&dg00x->tx_resources);
335 int snd_dg00x_stream_start_duplex(struct snd_dg00x *dg00x)
337 unsigned int generation = dg00x->rx_resources.generation;
340 if (dg00x->substreams_counter == 0)
343 if (amdtp_streaming_error(&dg00x->tx_stream) ||
344 amdtp_streaming_error(&dg00x->rx_stream)) {
345 amdtp_domain_stop(&dg00x->domain);
346 finish_session(dg00x);
349 if (generation != fw_parent_device(dg00x->unit)->card->generation) {
350 err = fw_iso_resources_update(&dg00x->tx_resources);
354 err = fw_iso_resources_update(&dg00x->rx_resources);
363 if (!amdtp_stream_running(&dg00x->rx_stream)) {
364 int spd = fw_parent_device(dg00x->unit)->max_speed;
366 err = begin_session(dg00x);
370 err = amdtp_domain_add_stream(&dg00x->domain, &dg00x->rx_stream,
371 dg00x->rx_resources.channel, spd);
375 err = amdtp_domain_add_stream(&dg00x->domain, &dg00x->tx_stream,
376 dg00x->tx_resources.channel, spd);
384 err = amdtp_domain_start(&dg00x->domain, 0, true, true);
388 if (!amdtp_domain_wait_ready(&dg00x->domain, READY_TIMEOUT_MS)) {
396 amdtp_domain_stop(&dg00x->domain);
397 finish_session(dg00x);
402 void snd_dg00x_stream_stop_duplex(struct snd_dg00x *dg00x)
404 if (dg00x->substreams_counter == 0) {
405 amdtp_domain_stop(&dg00x->domain);
406 finish_session(dg00x);
408 fw_iso_resources_free(&dg00x->tx_resources);
409 fw_iso_resources_free(&dg00x->rx_resources);
413 void snd_dg00x_stream_update_duplex(struct snd_dg00x *dg00x)
415 fw_iso_resources_update(&dg00x->tx_resources);
416 fw_iso_resources_update(&dg00x->rx_resources);
418 amdtp_stream_update(&dg00x->tx_stream);
419 amdtp_stream_update(&dg00x->rx_stream);
422 void snd_dg00x_stream_lock_changed(struct snd_dg00x *dg00x)
424 dg00x->dev_lock_changed = true;
425 wake_up(&dg00x->hwdep_wait);
428 int snd_dg00x_stream_lock_try(struct snd_dg00x *dg00x)
432 spin_lock_irq(&dg00x->lock);
435 if (dg00x->dev_lock_count < 0) {
441 if (dg00x->dev_lock_count++ == 0)
442 snd_dg00x_stream_lock_changed(dg00x);
445 spin_unlock_irq(&dg00x->lock);
449 void snd_dg00x_stream_lock_release(struct snd_dg00x *dg00x)
451 spin_lock_irq(&dg00x->lock);
453 if (WARN_ON(dg00x->dev_lock_count <= 0))
455 if (--dg00x->dev_lock_count == 0)
456 snd_dg00x_stream_lock_changed(dg00x);
458 spin_unlock_irq(&dg00x->lock);