Lines Matching refs:src_reg
8 /* ALU ops on registers, bpf_add|sub|...: dst_reg += src_reg */
14 .src_reg = SRC, \
22 .src_reg = SRC, \
32 .src_reg = 0, \
40 .src_reg = 0, \
44 /* Short form of mov, dst_reg = src_reg */
50 .src_reg = SRC, \
58 .src_reg = SRC, \
68 .src_reg = 0, \
76 .src_reg = 0, \
88 .src_reg = SRC, \
94 .src_reg = 0, \
113 .src_reg = 0, \
117 /* Memory load, dst_reg = *(uint *) (src_reg + off16) */
123 .src_reg = SRC, \
127 /* Memory store, *(uint *) (dst_reg + off16) = src_reg */
133 .src_reg = SRC, \
140 * BPF_ADD *(uint *) (dst_reg + off16) += src_reg
141 * BPF_AND *(uint *) (dst_reg + off16) &= src_reg
142 * BPF_OR *(uint *) (dst_reg + off16) |= src_reg
143 * BPF_XOR *(uint *) (dst_reg + off16) ^= src_reg
144 * BPF_ADD | BPF_FETCH src_reg = atomic_fetch_add(dst_reg + off16, src_reg);
145 * BPF_AND | BPF_FETCH src_reg = atomic_fetch_and(dst_reg + off16, src_reg);
146 * BPF_OR | BPF_FETCH src_reg = atomic_fetch_or(dst_reg + off16, src_reg);
147 * BPF_XOR | BPF_FETCH src_reg = atomic_fetch_xor(dst_reg + off16, src_reg);
148 * BPF_XCHG src_reg = atomic_xchg(dst_reg + off16, src_reg)
149 * BPF_CMPXCHG r0 = atomic_cmpxchg(dst_reg + off16, r0, src_reg)
156 .src_reg = SRC, \
169 .src_reg = 0, \
173 /* Conditional jumps against registers, if (dst_reg 'op' src_reg) goto pc + off16 */
179 .src_reg = SRC, \
189 .src_reg = SRC, \
199 .src_reg = 0, \
209 .src_reg = 0, \
219 .src_reg = SRC, \
229 .src_reg = 0, \