Lines Matching refs:x1000
919 #define WM8994_SPKOUTL_ENA 0x1000 /* SPKOUTL_ENA */
920 #define WM8994_SPKOUTL_ENA_MASK 0x1000 /* SPKOUTL_ENA */
998 #define WM8994_LINEOUT1P_ENA 0x1000 /* LINEOUT1P_ENA */
999 #define WM8994_LINEOUT1P_ENA_MASK 0x1000 /* LINEOUT1P_ENA */
1042 #define WM8994_AIF2ADCR_ENA 0x1000 /* AIF2ADCR_ENA */
1043 #define WM8994_AIF2ADCR_ENA_MASK 0x1000 /* AIF2ADCR_ENA */
1094 #define WM8994_AIF2DACR_ENA 0x1000 /* AIF2DACR_ENA */
1095 #define WM8994_AIF2DACR_ENA_MASK 0x1000 /* AIF2DACR_ENA */
2065 #define WM8994_DCS_TRIG_SINGLE_0 0x1000 /* DCS_TRIG_SINGLE_0 */
2066 #define WM8994_DCS_TRIG_SINGLE_0_MASK 0x1000 /* DCS_TRIG_SINGLE_0 */
2332 #define WM8958_DSP2CLK_SRC 0x1000 /* DSP2CLK_SRC */
2333 #define WM8958_DSP2CLK_SRC_MASK 0x1000 /* DSP2CLK_SRC */
2651 #define WM8994_AIF1_LRCLK_FRC 0x1000 /* AIF1_LRCLK_FRC */
2652 #define WM8994_AIF1_LRCLK_FRC_MASK 0x1000 /* AIF1_LRCLK_FRC */
2666 #define WM8958_AIF1_LRCLK_INV 0x1000 /* AIF1_LRCLK_INV */
2667 #define WM8958_AIF1_LRCLK_INV_MASK 0x1000 /* AIF1_LRCLK_INV */
2681 #define WM8958_AIF1_LRCLK_INV 0x1000 /* AIF1_LRCLK_INV */
2682 #define WM8958_AIF1_LRCLK_INV_MASK 0x1000 /* AIF1_LRCLK_INV */
2732 #define WM8994_AIF2ADC_TDM_CHAN 0x1000 /* AIF2ADC_TDM_CHAN */
2733 #define WM8994_AIF2ADC_TDM_CHAN_MASK 0x1000 /* AIF2ADC_TDM_CHAN */
2766 #define WM8994_AIF2DAC_TDM_CHAN 0x1000 /* AIF2DAC_TDM_CHAN */
2767 #define WM8994_AIF2DAC_TDM_CHAN_MASK 0x1000 /* AIF2DAC_TDM_CHAN */
2813 #define WM8994_AIF2_LRCLK_FRC 0x1000 /* AIF2_LRCLK_FRC */
2814 #define WM8994_AIF2_LRCLK_FRC_MASK 0x1000 /* AIF2_LRCLK_FRC */
3026 #define WM8994_AIF1ADC1L_HPF 0x1000 /* AIF1ADC1L_HPF */
3027 #define WM8994_AIF1ADC1L_HPF_MASK 0x1000 /* AIF1ADC1L_HPF */
3041 #define WM8994_AIF1ADC2L_HPF 0x1000 /* AIF1ADC2L_HPF */
3042 #define WM8994_AIF1ADC2L_HPF_MASK 0x1000 /* AIF1ADC2L_HPF */
3714 #define WM8994_AIF2ADCL_HPF 0x1000 /* AIF2ADCL_HPF */
3715 #define WM8994_AIF2ADCL_HPF_MASK 0x1000 /* AIF2ADCL_HPF */
4446 #define WM8994_FIFOS_ERR_EINT 0x1000 /* FIFOS_ERR_EINT */
4447 #define WM8994_FIFOS_ERR_EINT_MASK 0x1000 /* FIFOS_ERR_EINT */
4514 #define WM8994_FIFOS_ERR_STS 0x1000 /* FIFOS_ERR_STS */
4515 #define WM8994_FIFOS_ERR_STS_MASK 0x1000 /* FIFOS_ERR_STS */
4630 #define WM8994_IM_FIFOS_ERR_EINT 0x1000 /* IM_FIFOS_ERR_EINT */
4631 #define WM8994_IM_FIFOS_ERR_EINT_MASK 0x1000 /* IM_FIFOS_ERR_EINT */