Lines Matching refs:tdfx_inl
242 static inline u32 tdfx_inl(struct tdfx_par *par, unsigned int reg)
256 while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1)
269 if ((tdfx_inl(par, STATUS) & STATUS_BUSY) == 0)
284 tdfx_inl(par, DACADDR);
344 tdfx_outl(par, MISCINIT1, tdfx_inl(par, MISCINIT1) | 0x01);
404 u32 draminit0 = tdfx_inl(par, DRAMINIT0);
405 u32 draminit1 = tdfx_inl(par, DRAMINIT1);
424 miscinit1 = tdfx_inl(par, MISCINIT1);
683 reg.vgainit1 = tdfx_inl(par, VGAINIT1) & 0x1fffff;
705 reg.miscinit0 = tdfx_inl(par, MISCINIT0);
792 u32 dacmode = tdfx_inl(par, DACMODE);
1054 vidcfg = tdfx_inl(par, VIDPROCCFG);
1173 r = tdfx_inl(par, VIDSERPARPORT);
1179 tdfx_inl(par, VIDSERPARPORT); /* flush posted write */
1188 r = tdfx_inl(par, VIDSERPARPORT);
1194 tdfx_inl(par, VIDSERPARPORT); /* flush posted write */
1206 return (0 != (tdfx_inl(par, VIDSERPARPORT) & I2C_SCL_IN));
1214 return (0 != (tdfx_inl(par, VIDSERPARPORT) & I2C_SDA_IN));
1223 r = tdfx_inl(par, VIDSERPARPORT);
1229 tdfx_inl(par, VIDSERPARPORT); /* flush posted write */
1238 r = tdfx_inl(par, VIDSERPARPORT);
1244 tdfx_inl(par, VIDSERPARPORT); /* flush posted write */
1252 return (0 != (tdfx_inl(par, VIDSERPARPORT) & DDC_SCL_IN));
1260 return (0 != (tdfx_inl(par, VIDSERPARPORT) & DDC_SDA_IN));