Lines Matching refs:vbase
183 static inline u32 __sst_read(u8 __iomem *vbase, u32 reg)
185 u32 ret = readl(vbase + reg);
190 static inline void __sst_write(u8 __iomem *vbase, u32 reg, u32 val)
193 writel(val, vbase + reg);
196 static inline void __sst_set_bits(u8 __iomem *vbase, u32 reg, u32 val)
199 __sst_write(vbase, reg, __sst_read(vbase, reg) | val);
202 static inline void __sst_unset_bits(u8 __iomem *vbase, u32 reg, u32 val)
205 __sst_write(vbase, reg, __sst_read(vbase, reg) & ~val);
217 static int __sst_wait_idle(u8 __iomem *vbase)
221 /* if (doFBINOP) __sst_write(vbase, NOPCMD, 0); */
224 if (__sst_read(vbase, STATUS) & STATUS_FBI_BUSY) {
242 static u8 __sst_dac_read(u8 __iomem *vbase, u8 reg)
247 __sst_write(vbase, DAC_DATA, ((u32)reg << 8) | DAC_READ_CMD );
248 __sst_wait_idle(vbase);
250 ret = __sst_read(vbase, DAC_READ) & 0xff;
256 static void __sst_dac_write(u8 __iomem *vbase, u8 reg, u8 val)
260 __sst_write(vbase, DAC_DATA,(((u32)reg << 8)) | (u32)val);
261 __sst_wait_idle(vbase);
265 static u32 __dac_i_read(u8 __iomem *vbase, u8 reg)
269 __sst_dac_write(vbase, DACREG_ADDR_I, reg);
270 ret = __sst_dac_read(vbase, DACREG_DATA_I);
274 static void __dac_i_write(u8 __iomem *vbase, u8 reg,u8 val)
277 __sst_dac_write(vbase, DACREG_ADDR_I, reg);
278 __sst_dac_write(vbase, DACREG_DATA_I, val);